I employed an OP37 op amp to build an integrator as shown below.
There is noise caused by resetting the integrator. I made V_IN ground, and V_OUT is as following graphs. CLOCK frequency is 200 kHz.
- Why does this occur?
- How can I eliminate it?
V_OUT:
The used probe is a GTP-250A-2:
This is my new probe setup according to Tony Stewart EE75 and winny comments:
These are the results for 1x and 10x probe, respectively:
(It is weird that the 10X result is worse.)
Something that I suspected was the redundant traces that I placed allow me to easily install capacitors with different values. I tested different capacitors with PXC connector (X2) as below pic. However, when I trimmed the capacitor legs and soldered it to C35 actual position, the noise only reduced 10 mV. So it is not likely the problem. Am I right?
One thing likely to be worth mentioning is that when I change CLOCK to 2 kHz, the same result will appear. (It may imply that rise time plays the key role, not the sampling frequency.)
Best Answer
This is normal, 1x probes have very low bandwidth, so the spike is there, but the probe lowpasses it, so you don't see anything. Also 1x probe loads the circuit a lot because it presents the full cable capacitance to whatever you're probing, so it will eat the spike and it will disappear when you probe for it.
If you want to watch something fast, always use 10x probe with tiny ground spring. The alligator ground clip has lots of inductance so on fast signals you'll see plenty of ringing, but that's just the improper probe grounding, when using the tiny ground clip, it's much cleaner. Also the alligator wire will act as an antenna and pick up noise from nearby DC-DC converters.
Now the solution to your problem is to use a switch with low charge injection like Spehro recommends, and you should do that, the chip is designed for this, you'll never get that clean with just a FET, so it's a worthy investment. But this won't solve your other problems...
First, don't put some 74LVC near analog stuff. They have fast edges and high current output, which means they make a lot of noise. If you still need to generate a pulse for the analog switch IC, try something quieter, slower, with lower output drive, like 74HC or AHC, and put a 33R SMD resistor in the output to avoid any ringing. And put a decoupling cap on them!
Second, I think there is a full ground plane on layer2, but it is not connected to the ground pour on layer1, which means there is no ground plane on your board.
I see the GND pin of the opamp decoupling caps are connected to the ground pour on layer1, so the layout software says "happy DRC! job done!" but the path the current flowing through these caps will have to follow to actually get where it needs to go is pretty complicated, in fact it will snake all over the whole board. So the spiky currents from 74LVC will put noise into absolutely everything.
Solution: get rid of the ground pour, have a continuous ground plane on layer2, and put ground vias on every thing that has a "GND" pin.