Electronic – Noisy output on voltage reference and correct probing

1st ensure you are not seeing capture measurement error across your decoupling cap near IC.

Probe ground and check you get a noise free flat line.

If not, arrange for 2 pins or short wires <1cm on Vref and gnd to be probed with tip and ground wire removed and use barrel ground to gnd pin and pin for signal to get the cleanest signal.

Convenient method below.

Better method for SMD below.

You can buy these spring attachments for convenient accurate low noise measurements on 10:1 probes. ( or makeshift from pen spring ;)

Then ensure BW of scope is limited to range of spectrum expected. e.g. 10MHz here.

To locate EMI use the probe as a loop antenna then with gnd clip shorted to pin and wave over affected inductor current loop on SMPS to see what is being inductively coupled to high impedance tracks.

THen adding series choke or ferrite bead can raise track impedance >1MHz thus improve ZL/ZC LPF effects. Ensure Caps are low ESR.

Lastly ensure output cap value min/max and ESR min/max is added as recommended in datasheet.

ref: datasheet... Noise should be < 30nV per square root Bandwidth of signal captured or 6uV pp max with no load.

C load must be << 0.1uF for good phase margin if RL<1K.

Any differential ADC (and the op-amps too) will have a common mode rejection ratio (CMRR). So The common mode voltage (the average of the + and -) terminals will affect the output.

All op-amps also have an input offset voltage that essentially adds to your differential input voltage when computing the output. The input offset may be just a few microvolts for very precise amplifiers, or it may be a few millivolts for most common op amps. ADCs have a similar parameter which would be the zero offset, which is typically several LSB.

Put mathematically, one could model the output as...
Vout = G * (V+ - V- + Vos) + C * (V+ + V-)/2
Where...
V+ is the non inverting input.
V- is the inverting input.
C is a factor edpending on your CMRR. It would be 1/100 for 40dB of CMRR, and 1/1000 for 60dB of CMRR, etc.

So for example if the common mode rejection ratio say 60dB then you would see a change in the output measurement that is equivalent to 1mV of change at the differential input voltage for every 1V of change in the common mode voltage.

If your input voltage range is just a few mV then input offset and CMRR need to be considered or your measurement will be washed out by component tolerances.