Electronic – Opamp: amplifying DC bias problem in output

The simulator first finds the DC solution and uses the results as the initial conditions for the transient simulation.

Zeroing the signal source and assuming the signal source has no DC offset voltage, the voltage across the capacitor in DC steady state is 45V with the right-most terminal the more positive.

Looking closer at your pulse generator statement, I see that the initial transient solution will give 50V across the capacitor since, at time zero, the pulse source has -5V across.

Thus, 50V is initially added to the square wave; the source swings from -5V to +5V and the output swings from 45V to 55V.

After several time constants, you should find the simulation gives the results you expect.

The time constant for your circuit is

$$\tau = 5k\Omega \cdot 100 nF = 500 \mu s $$

so I would expect that if you run your simulation for, say, \$5ms\$, you would find that after about \$2.5ms\$, the simulation should be approximately what you expect.

UPDATE:

Here's a screen shot of a simulation I ran:

As predicted, after about \$2.5ms\$, the DC voltage component across the capacitor decays from 50V to 45V and the output swings from 40V to 50V as desired.

Nice, (+1 for opa454, I didn't know this opamp.) I've also used BTL to get more voltage out of low voltage high current opamps. (OPA569 driving a TEC.) As far as your question. I guess the traditional approach doesn't have any gain balancing. (It's just a unity gain inverter.) And I've never been worried about noise in the driver stage. So my only answer is simplicity.