Electronic – OpenOCD child process termination: Wrong device detected



I have an STM32F103C8T6 minimal eval board (see STM32F103C8T6).

And I'm using an ST link like the picture below.

I installed System Workbench for Eclipse. I created my own project (C++, Empty Project, toolchains: Ac6 STM 32 MCU GCC),
Series: STM32F1, Mcu: STM32F103C8Tx, Core: ARM Cortex-M3, Package: LQFP48, Memory ram: Size 0x5000, memory ROM: size 0x10000.


The code contains a system_stm32f10x.c file which was generated (or automatically included) by the IDE.

The program compiles ok:

  * @file    main.c
  * @author  Ac6
  * @version V1.0
  * @date    01-December-2013
  * @brief   Default main function.

#include "stm32f10x.h"
#include <stm32f10x_rcc.h>

void delay(int counter)
    volatile int i;
    for (i = 0; i < counter * 10000; i++) {}

int main(void)
    GPIO_InitTypeDef gpio;
    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);

    gpio.GPIO_Pin = GPIO_Pin_13;
    gpio.GPIO_Mode = GPIO_Mode_Out_PP;
    gpio.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_Init(GPIOC, &gpio);

    GPIO_SetBits(GPIOC, GPIO_Pin_13);

    while (1)
        GPIO_SetBits(GPIOC, GPIO_Pin_13); // LED ON
        GPIO_ResetBits(GPIOC, GPIO_Pin_13); // LED OFF

Upload by OpenSTM32

When I create a Run configuration (no changes made), and select Run I get the following error (in console):

Open On-Chip Debugger 0.10.0-dev-00302-gc211ca5-dirty (2017-07-03-10:41)
Licensed under GNU GPL v2
For bug reports, read
srst_only separate srst_nogate srst_open_drain connect_assert_srst
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 950 kHz
adapter_nsrst_delay: 100
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v17 API v2 SWIM v4 VID 0x0483 PID 0x3748
Info : vid/pid are not identical: 0x0483/0x374B 0x0483/0x3748
Info : using stlink api v2
Info : Target voltage: 3.231135
Info : STM32F103C8Tx.cpu: hardware has 6 breakpoints, 4 watchpoints
adapter speed: 950 kHz
Error: timed out while waiting for target halted
TARGET: STM32F103C8Tx.cpu - Not halted
in procedure 'program' 
in procedure 'reset' called at file "embedded:startup.tcl", line 478
in procedure 'ocd_bouncer'

** Unable to reset target **
shutdown command invoked


  • STlink SWDIO pin 2 -> pin 7 of JTAG
  • STlink GND pin 4 GND -> pin 4 of JTAG
  • STlink SWCLK pin 6 -> pin 9 of JTAG
  • USB -> USB ( STlink 3.3V pin 8 not connected, neither all other STlink pins)


enter image description here

Debug configuration file

# This is an F103C8T6_Simple board with a single STM32F103C8Tx chip
# Generated by System Workbench for STM32
# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s)

source [find interface/stlink.cfg] 


transport select "hla_swd"


# Enable debug when in low power modes

# Stop Watchdog counters when halt

# STlink Debug clock frequency
set CLOCK_FREQ 4000

# use hardware reset, connect under reset
# connect_assert_srst needed if low power mode application running (WFI...)
reset_config srst_only srst_nogate connect_assert_srst

source [find target/stm32f1x.cfg]

Run configurations screen

enter image description here


I could send a program via the Link utility, see below. I don't see a blinking light, but maybe the program is incorrect.

However, this way is not very comfortable (and I don't see any program running). Also, I still cannot debug this way.

enter image description here

Program upload/verify


See my answer (to help others with the similar problem)

Thank you all very much for your answers and numerous useful remarks.

Best Answer

Connections made: STlink SWDIO pin 2 -> pin 7 of JTAG STlink GND pin 4 GND -> pin 4 of JTAG STlink SWCLK pin 6 -> pin 9 of JTAG STlink 3.3V pin 8 -> pin 2 of JTAG

Resetting doesn't mysteriously happen. It is actually a direct connection into MCU reset pin from the jtag/swd which is missing in your configuration.

edit: That was wrong. See comment of Chris.

* update *

Emulation reset needs correct openocd config parameters, which are set for hardware reset currently. "srst" is all about system reset which is not about emulation. Also read the manual on the github carefully: Author makes the reset manually, pushing the reset button before issuing reset command and releasing within the wait-the-reset period of openocd.

Also removing the parameter "reset on connect" from the config file may ease things for such manual resetting.

So, the solution is either manual resetting, or correct parameters for emulation (If your chip actually has it; I had to strike the text above because of the conceptional error, I don't know if your chip has it) or adapting your stlink's reset signal into board.

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