Electronic – OrCAD: Uniqueness/Scope of Net Aliases, Busses, and Net Groups, Hierarchical Ports, and Off-page Connectors

allegroorcad

I am using Allegro/OrCAD Capture. I need some confirmation about the scope of some various types of nets in Allegro/OrCAD Capture, particularly with regards to hierarchical design and projects with multiple schematics, and with multiple pages under each schematic.

There is a distinction here between "schematics" and "pages". Multiple schematics can appear under the same project file. Multiple pages can appear under the same schematic. A schematic can be turned into a hierarchical block which can be placed into another schematic. A page cannot be turned into a hierarchical block, therefore a hierarchical blocks that is placed on a page within a schematic must come from another schematic, not a page within the same schematic.

I would like some things confirmed or answered.

  1. Is a net alias unique only within the page it appears on? (i.e. the
    same net alias on different pages will be treated as different nets)

    Or is a net alias unique for the entire schematic under which it
    appears? (i.e. the same net alias on different pages in the same
    schematic are the same net)

  2. Are off-page connectors only unique within the schematic they appear
    under? (i.e. they can only connect between pages under the same
    schematic, and the same off-page connector name used in two
    different schematics are treated as being on different nets)

    Or are off-page connectors unique to the entire project? (i.e. all
    off-page connectors with the same name under the same project are
    treated as the same net.) This possibility seems highly unlikely.

  3. Are hierarchical ports are only unique under the schematic in which
    they appear?

  4. How far does the uniqueness of a bus Is it within a page? Or is it
    everything under a schematic? Or is it everything in the project?

    How far does the uniqueness of a netgroup name extend? Is it only
    within a page? Or is it everything under a schematic? Or is it
    everything in the project?

Best Answer

I made a bunch of tests with a fake project and PCB layout.

  1. Net aliases are unique only within the pages they appear in.

  2. Aliases for off-page connectors are unique only within the schematic they appear under.

  3. Hierarchical ports are only unique under the schematic in which they appear. If they were not they would be unable to serve their purpose with re-usable hierarchical blocks where block representations of one schematic are placed within another schematic. I have always used them instead of off-page connectors because they look better but it looks like this is ultimately a bad idea once you start going into hierarchical designs.

  4. When defined, a netgroup is a template for the entire project. Then different instances of it can be placed throughout the schematics. Busses, and instances of netgroups are unique only within the page that they appear. Off-page connectors are required bring them off page.

Also, a bunch of additional tests determined that:

  • Within a page, the net alias for entries into a line going to a hierarchical port for a netgroup must share the same net alias. If no net alias is given for the line it will adopt the name of the hierarchical port to which it is connected. (I did not check how it behaves if the line is given a different alias than the port name).
  • A line connecting two hierarchical ports must be named
  • Individual connections between two hierarchical ports for netgroups are determined by the order of signals defined in definition of both netgroups (1st to 1st, 2nd to 2nd, etc).
  • Individual connections between two hierarchical ports for busses (and presumably component pins defined as busses) are made based on the wire entry tag numbers (i.e. not according to any placement ordering that might appear on the schematic)
  • Connecting two busses contained in a hierarchical block does not require naming of the bus. This appears to be the one exception where a multi-connection line (i.e. a bus or netgroup line) does not require a name.
  • Presumably, another instance where a bus does not require an alias is if there are wire entries entering and exiting the bus on the same page that share the same net alias. That said, if the bus is then giving a name that conflicts with the net alias for the wire entries, I suspect the connection would be broken.