The analysis of the effect of a capacitor placed across the output terminals, in parallel with the resistive load, can be done by considering the load to be the parallel combination of the capacitor and load resistor.
Without the "output capacitor", your circuit has an output impedance, \$Z_O \$ and an open-circuit phasor output voltage, \$V_{oc} \$. Your load is an impedance, \$Z_L\$.
The phasor load voltage is then:
\$V_l = V_{oc} \dfrac{Z_L}{Z_L + Z_O}\$
Now, let's assume that the output impedance is real: \$Z_O = R_O \$
If the "load" is a capacitor in parallel with a resistor,
\$Z_L = \dfrac{R_L}{1 + j \omega R_L C_O}\$
Then:
\$V_l = V_{oc} \dfrac{R_L}{R_L + R_O}\dfrac{1}{1 + j \omega (R_L||R_O)C_O} \$
So, yes there is a pole due to the parallel capacitor.
You've answered the question yourself - "with given values".
The amount of ripple current is defined by the buck inductor value and the volt-seconds applied to it. If you change operating point (different input voltage, different output voltage, different switching frequency) or change the inductance value, the ripple current will change.
Why is there so much ripple? That's how the circuit was designed. A DCM buck would have even higher ripple, which is a trade-off for simpler loop stabilization. If you want less ripple, make it CCM and design your slightly more complex loop accordingly.
The amount of current ripple applied to Cout is what defines the amount of ripple voltage you get on the output. So yes, in a manner of speaking, Cout "takes care of" the ripple current in so far as it deals with whatever's applied. If Cout is too small, your output won't stay in regulation.
You haven't specified enough about your application, but there is no reason why a 300mA buck operating at 247mA of ripple current couldn't be stable. It would be barely in DCM mode, but that's fine as long as your output capacitor ESR could handle the ripple and your application is OK with the ripple voltage.
Best Answer
It depends on many factors. The load (ohmic or others), the state variables, the operation mode (CCM/DCM) and others. After you decide these factors you can formulate the state matrices (A,B,C,D).
Following is a simple Matlab code may help you studying any converter poles position with different capacitor values. The state formulation is taken from this paper. The capacitor varies between \$5 \mu F\$ and \$50 \mu F\$ with step change of \$5 \mu F\$.
And the result for this particular case,
So for this particular formulation, the increment of capacitor drag the poles of the system to the right hand side of the poles map.