Electronic – Pastemask. Manufacturing PCBs

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after finishing some designs, it is time to manufacture and assemble them.

For making these designs I have to create all padstacks, footprints, etc from scratch, so I took PCB Editor examples as guide for doing mine.
Now, when I send the gerbers (etch layers, soldermask, silkscreen, drill) to our manufacturing house, they requested me the pastemask ones.
Although they can generate them from gerbers, they are enquiring me to generate the pastemask gerbers with our own requirements.
So, I need a little help to get the proper guidelines to avoid any possible error.

Then, I wonder if you can provide some guidelines about how to define and create the proper pastemask layers.

From PCB Editor examples, most of passive components have no pastemask defined (SMT and THR), and from IC pads the relation between pads size and solder paste are 1:1 in most cases.

I have in mind next possible requirements:

  1. THR components: 1:1
  2. SMT components with padstack larger than 1mm: 1:1
  3. SMT components with padstack shorter than 1mm: 1:0.9
  4. IC perimeter pads: 1:1
  5. QFN perimeter pads: 1:0.9
  6. QFN thermpad: <1:0.7
  7. BGA pads: 1:0.9
  8. Any other pads: suggestions accepted

Are these requirements right?

And finally,

  1. Which is the best option, provide pastemask layer to manufacturers? Or should I let him create them?
  2. In the case, I have to create the pastemask layers, which are the best guidelines to follow them?

Kind Regards.

Best Answer

I believe that the IPC recommendation is to make the stencil apertures the same size as the pads.

Altium, for example, allows you to set the paste expansion via rules or individually, but the default is 0.0mm.

You don't generally want solder paste on through-hole pads.

Usually paste with stencil apertures the same as the pads is also recommended for BGA, but it's said to be possible to just use flux.

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