Electronic – PCB layout of buck converter: capacitor placement

buckdc/dc converterlayoutpcb

I'm designing a PCB for an IC that includes a DC/DC buck converter (MP2617). This is my first PCB, so I've been using the following resources for the layout: 1 and 2 (PDF files, the first one is a general layout guide for buck converters, the second one is a datasheet for another buck IC that has an extensive layout section).

I'm puzzled by an apparent contradiction between the two documents:

Document 1 says (page 7, paragraph 2):

Because high frequency of several hundred MHz is loaded on ground of input, so placing ground of CIN and CO 1cm to 2cm apart is recommended. If they are close to each other, high frequency noise of input may be propagated to output through CO.

whereas document 2 says (page 20):

The (–) plate of COUT should be closely connected to PGND and the (–) plate of CIN.

The point at which the ground terminals of the VIN and VOUT bypass capacitors are connected makes a good, low noise reference point.

Who should I believe here?

Best Answer

There is a lot of ripple current in the input caps in a buck converter. However, if you have a good solid ground plane you don't need to worry about "frequencies of several hundred MHz being loaded on ground of input." Further, your large output caps will have a self-resonant frequency below 100s of MHz and will essentially be inductive at those frequencies.

In all the many hundreds of buck converters I've laid out or looked at I've never seen a problem where input ground noise couples through the ouput cap's ground to the output. Many of these had a close low-inductance connection between input and output caps. Where are they suggesting the output reference is anyway? Wouldn't it be the negative terminal of the output cap?

This is not to say that ground noise can't be a problem. Poorly designed grounding schemes can absolutely lead to a noisy output. It's just that tightly coupling the grounds of the input and output caps is not a problem in my experience.