Electronic – PCB Techniques for RF Circuits

pcb-designRF

Following this Linear Technology (Analog.com) Application Note AN47FA (1991), I found these kind of RF PCBs, among many others, very similar (fig.32 p.18 and Fig.F10 p.107).

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(The images are in B&W because of some aestetics for the document.)

Putting aside that these are actually single copper plates, i.e. not PCBs strictly speaking, some of the criteria inferred from the document explanations are:

  • Shorten the output lead lengths,
  • Use a global ground plane,
  • Use a plate behind a connector as reflection plane.

But are these techniques actually standardized in more modern RF PCBs?

Which should be a more formal guideline for these techniques?

Are them somehow superseed by better components of PCB printing technology?

Or are these circuits build that way because in that time the PCBs were more expensive? I really doubt this last point, lab techniques for making PCBs were well known at that time, and the same document pointed the soldering made carelessly.

Thanks in advance,

Best Answer

I have to disagree with the legendary Jim Williams (and Bob Pease, who also was known for this technique). These are, in my opinion, not RF circuits. This is a set of techniques to (try to) push the lumped-element model that many circuit designers use up to higher and higher frequencies.

Circuit design is generally done with our lumped-element design model - it is the way most of us get taught and most of us "think" - we have lumped components such as resistors, transistors, capacitors, etc... connected with connections that have no loss, delay, or inductance.

Of course, in practice, these connections do have loss (resistance), an inductance, capacitance, etc. The impact of these non-ideal interconnects become more and more of an issue at higher frequency (mainly the inductance part in this case). As a result, for ''high frequencies\$^1\$'' connections, the model breaks down and these non-ideal components have a significant impact on performance. To reduce this impact as much as possible, Williams' proposes to reduce the parasitic inductance as much as possible.

The key is that in ''real'' RF design, we stop thinking about these interconnects as idealized. Instead, we start thinking about impedance matching and modeling interconnects as transmission lines. Once we do, and we use these transmission lines, we no longer need to try and make the interconnects as short as possible to minimize their impact, as we include their impact from the start. This is why all RF design is (or at least should be) done using transmission lines and impedance matching.

The advantage of building a circuit as shown here is that it is fast. Just grab a piece of copper prototype board, solder stuff together and voila we have our prototype board to test with. I think in modern engineering this has changed, as devices have become smaller and smaller and now (at least in my line of work) we design a board to test with during the design phase - testing is a fundamental part of the design process. (if you cannot reliably and repeatedly test a design, you cannot sell it).

Note that even at RF we sometimes do still design without transmission lines but then we do need to very accurately model the interconnects to verify performance.

So to really answer your question, no, there is no standard guideline like this for RF design because this is not something that is done in much modern production RF design.

\$^1\$What is a ''high frequency'' is relative - to a analog designer doing low voltage, high precision measurements a few hundred MHz might be ''high frequency''. For millimeter-wave radar designers, a few GHz is still ''low frequency''.

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