My PCB manufacturer just informed me that he is facing PCB warpage issue in my simple, single sided, copper poured PCB. He says to avoid this issue he suggests to add a dummy copper patch by keeping 3mm copper clearance from all sides. I am not very experienced with PCB issues. Can somebody tell me what leads to this issue and what are possible solutions to this problem ?
Electronic – PCB Warpage Issue in PCB manufacturing
pcb-design
Related Solutions
A very nicely presented 1st question (or 100th or ...).
Lots of detail to assimilate but it all seems relevant and useful if a good answer is to be found. I cannot spend the time needed now on this but will throw in a few comments and see what others have said later.
I spent about 15 minutes just going to and fro over the circuits and layouts and doing some basic sanity checking. I'm sure your rule checking would have eliminated basic errors.
I have NOT tried to work out what your fault may be caused by specifically - and suspect that it may be a hard fault or misthought rather than the design areas touched on below. BUT any of the following may relate.
Have you tried placing the whole PCB on a PCB ground plane? Can help heaps with single sided. May not.
The two unrouted nets shown presumably have wire links added by hand. (If not that would be an easy fix :-) )
A single side board MAY be doable but with such a complex beast with two switchers and the ability for feedback between them you'd need real care, a scope glued to your right hand and some luck. Even a double sided board (which is about as cheap and quick from many board houses) costs much the same.
A problem is (which may have led to a problem that you get) that the IC seems to have pinouts which assume you can route across the IC with ease so that critical current loops have little area. Because you are on 1 layer this is not true and you have several such loops that more or less overlap and seem to invite disaster.
The obvious ones to minimise to start are the two inductor loops p7-L1-p15 and p16&p17-L2-p14.The L1 loop involves an added jumper and how you route this may have an effect.
Noise getting into the feedback dividers can be bad news indeed. I see you have used c5 across R4 as per their circuit but have no cap across R8 - shown as Copt on one of their circuits and not on another. Simplistically this passes fast load transients or noise that affects output into the feedback pin at a greater rate and level than you get from the divider. Presence or absence in SOME designs is life or death.
Draw lines on printouts of the layout with different coloured markers as to where the loops seem likely to be that are used by different processes (Inductor currents, feedback dividers, ...). (Draw on a screen if that works for you - I find paper and markers more powerful). You can then see likely interactions and any loops that have large open front doors for noise / cross coupling to rush in and out of.
More later maybe.
Good job testing them before populating the board.
Based on the pictures, it looks like the place that made the board did a crappy job etching them. Some of the copper that was supposed to be etched away remained.
This could also happen if you didnt follow the minimum specs that the company recommends - they all should list minimum trace widths and clearances that you can set in your PCB design software to ensure the board can actually be made properly.
If you did follow their guidelines, it shouldn't take any more than those photos and an email to get a decent place to remake the boards.
If these are prototypes, and you really don't want to wait for new boards to arrive, you can try cutting the shorted areas with a sharp utility knife, if you can find them all. It might work, it might not - and you will have to test every trace against every other trace it runs near.
You can avoid this in the future in a few ways:
- Use a higher quality PCB manufacturer
- Bigger clearances between traces, where possible
- Electrical testing at the board house. It costs a little more, but helps ensure that what you recieve is what you asked for. It may not catch everything though.
Best Answer
The problem you mentioned is due to imbalance in thermal expand/shrink between layers (in this case copper vs base material, like laminate). When the copper from one side of PCB is completely etched it tends to warp when the copper on the other side cools. It happens when there is non-even number of layers.
Solution? Use double sided PCB (or any even number of layers) or instead of solid copper try to use grid copper (this is named "hatch" in PCB CAD program).
Please see https://www.multi-circuit-boards.eu/en/pcb-design-aid/copper-balance.html