Electronic – PIC problem: Touching the crystal capacitor makes the system slows down

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I am experiencing a very unusual problem (at least for me). When I touch with my fingers, or the oscilloscope probes, on the crystal or it's capacitors, the PIC runs slower…and A LOT slower then it should…with my fingers, most of the time it comes back to the real speed, but with the probes, it hangs forever.

I am running the PIC18F2550 at 48MHz with a 20MHz crystal…I supose I am maybe changing the capacitance "seen" by the PIC across the crystal and the oscillation circuit is going nuts..does it makes any sense? And if it does, what may I do to correct it?

EDIT:

The pictures below shows the circuit. The blue picture is the Bottom Layer of a 2 layer FR4 170Tg/290T ENIG board. I have highlighted the oscillator's traces, it's possible to see the ground plane, connected to both capacitors and the crystal in the middle, between them. The red picture is the Top Layer, where there is a big (and highlighted) ground plane, and some traces for two LEDs. There is also a transparent mix of the Top and Bottom layer, so see how they interact with each other. It's possible to see the PIC's orientation and schematics of this part of the project by the oscillator traces.

The problem only appears when the OSC1 capacitor is completly touched, or the OSC1 pin at the PIC is touched. Touching the traces or OSC2 capacitor doesn't bring any harm, as expected.

The Crystal:http://www.digikey.com/product-detail/en/NX5032GA-20.000000MHZ-LN-CD-1/644-1039-1-ND/1128911

The Crystal's Capacitors:http://www.digikey.com/product-detail/en/12061A150JAT2A/478-1439-1-ND/564471?cur=USD

EDIT2: The finger can have a 5pF to 15pF capacitance, so probably there is no much that can be done…http://ww1.microchip.com/downloads/en/AppNotes/01101a.pdf (page 2)
Removing the ground plane as pointed out in the answers is worst.

Bottom Layer

Top Layer

Bottom and Top Layer

The Oscilloscope waveforms:

OSC1 before being touched:

OSC1 before being touched

OSC1 after being touched:

OSC1 after being touched

OSC2 before OSC1 being touched:

OSC2 before OSC1 being touched

OSC2 after OSC1 being touched:

OSC2 after OSC1 being touched

Best Answer

I had a look at things and although what you are seeing when you load the high impedance pin of the oscillator is to be expected, it is still possible your circuit is not optimal.

Ideally the crystal traces would be as short as possible, with no high frequency/current traces crossing those traces at any point (also running under the micro is not ideal). In short the crystal and it's load capacitors will be as close to the pins as is practical.
Also, a ground "shield" trace running around the outside of the oscillator traces, and a local ground plane underneath the crystal can help reduce any external noise issues. These would be connected directly to the microcontrollers Vss at one point (if a ground plane layer is present, the capacitors can be grounded through vias to this)

I don't know what the other traces crossing your crystal traces are carrying (so how much of an issue they would be), but be aware of issues here. Also the traces are longer than is ideal.

Here is an example layout:

Oscillator Layout

To test how marginal your circuit may be, you need to see if it starts and runs okay over your operating temperature range. So cool/heat the circuit as necessary and cycle power to see if the oscillator starts correctly. If you apply a slight change and it doesn't start, you need to fix it.
Similarly, you need to determine how susceptible it is to noise. This is difficult to do "scientifically", but placing a noisy circuit (e.g. something that switches quickly with high current) near the oscillator can give you an idea of how easily it can be affected. How much of a concern this is depends on whether your circuit is intended for e.g. automotive/industrial or less noisy environments.

If you discover the circuit is marginal, then it could be that the drive is too high or low, both of which can cause issues. For a high frequency like 20MHz, a higher drive level is needed, so with a PIC this would correspond to the HS setting. If the drive level is too high, a series resistance can be included to adjust the drive as necessary (or with the PIC XT mode could be tried). Loading capacitance needs to be calculated/adjusted to include stray capacitance (CL1 || CL2 + Cstray - see app notes below for details) Another possibility is the crystal itself is not ideal, so trying another crystal is also an option.

When testing, ideally a 100x or FET probe would be used, and AC coupling the scope input will reduce loading also. If a 10x probe is used (or even a FET probe ideally), then you need to account for the extra capacitance by lowering the load capacitor on that side.

There are various ways of testing your oscillator to make sure it's stable/reliable. As well as the temperature tests, testing adequate drive can be done e.g. adding pot in series with the crystal, and increasing until the oscillator fails. When you reach this point the potentiometers measured value should be at least 5 times the crystal ESR to provide adequate gain over all conditions. This, and other methods of testing are discussed in the first link of helpful App notes below:

Making Your Oscillator Work (pretty good note on various methods of testing)
ST Oscillator Design Guide (layout diagram above came from this note)
EFM Oscillator Design Considerations
Crystal Oscillator Troubleshooting Guide - Freescale (examines common problems)
Design an Oscillator to Match your Application - Maxim (lots of useful theory)
Oscillators For Microcontrollers - Intel (old, but still very relevant)


Experimental data and scope shots

To add some direct data obtained by myself to the above, I took a dsPIC prototype with a 4MHz crystal (sorry, no boards with a 20MHz crystal to hand - the principle is exactly the same in any case) which was made up on breadboard (so an "ideal" layout is not really possible) and probed both OSC pins with a standard 10x probe. The purposes were to find out whether I could stop the oscillator, and to take a couple of example scope shots to see how it was performing.

The result was probing either side did not stop the oscillator, but it looks like the crystal is slightly overdriven (espcially since extra loading should reduce the gain a little)
Touching the pins did not even cause it to stop, however pressing firmly on the lead (high impedance side) of the 1 MΩ resistor I had put across the oscillator created enough capacitance to cause the amplitude to drop and the clipping to stop (a rough indication a little more load capacitance or a series resistor reduce drive slightly would be a good idea)

The overdrive is not of a concern for a breadboard prototype, since the oscillator does it's job and is very solid. However, the overdrive could eventually cause premature failure so would be an issue when designing for production. Ideally you would want enough drive to make it difficult to disturb the oscillator, but not too much so as to overdrive the crystal (so a nice sine wave at both sides).
This is easier said than done, as it requires the correct tools/approach, so is why in many cases engineers just follow the recommendations and hope for the best. This is not the best approach, as what may work fine at 25°C may not work at 35°C. So although it may be difficult to do, testing the oscillators performance at design time may save a lot of trouble later on.

Anyway, enough preaching, here are the pictures:

Board (sorry for bad lighting) - notice although it's messy, the crystal and caps (blue) are very close to the pins. The 1MΩ resistor across OSC1 and OSC2 is closest to the edge.

Board picture

OSC 2 low impedance side (slightly overdriven):

dsPIC Low Impedance side

OSC1 pin high impedance side:

dsPIC high impedance side

High impedance side with finger pressed firmly onto OSC1 (using resistor lead mentioned) Notice reduced amplitude and sine wave shape:

dsPIC high impedance side finger