Electronic – PIC18 how to explain : you write bit 1 by making TRIS input

cpicpins

I'm reading 1_wire header file for PIC18 with C18 compiler.
in the write_byte function, they specified that in order to write bit1; we make line input and that will take it high.
can we specify high or low output value in the TRIS port which specify i/o direction?

#define OW_LAT LATCbits.LATC1
#define OW_PIN PORTCbits.RC1
#define OW_TRIS TRISCbits.TRISC1

void ow_write_byte(unsigned char data)
{
    char i;
    for (i=0;i<8;i++)
    {
        // DQ Low
        OW_LAT=0;
        OW_TRIS=OUTPUT;
        // Keep it low for 10us to start the WRITE
        Delay10TCYx(10);
        // Keep low i.e. keep output mode and low if WRITE0 (bit 0)
        // or release line i.e. make input to take it high if WRITE1 (bit1)
        OW_TRIS = data & 0x01;
        Delay10TCYx(50);
        // Release the line. Total of 60us
        OW_TRIS=INPUT;
        // Some recovery time between the bits 2us
        Delay10TCYx(2);
        data =data >>1;
    }
}

Best Answer

The idea behind this is the following:

  • Setting the TRIS bit (making it 1) will make the corresponding pin an input.

    A typical extract from a PIC datasheet:

    Setting a TRISA bit (= 1) will make the corresponding PORTA pin an input (i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a TRISA bit (= 0) will make the corresponding PORTA pin an output (i.e., put the contents of the output latch on the selected pin).

  • That the pin is in high impedance mode, means (among other things) that the pin is not driven by the chip itself. Therefore, it takes any state that is defined by the external circuit (the circuit around the PIC).

  • The 1-wire bus uses pull-up resistors. You can see that on the wikipedia article:

    enter image description here

    As you can see, the default state is high. That means that the bus uses a pull-up resistor to make it's default state high.

    That's also written on the wikipedia:

    The Dallas 1-Wire network is physically implemented as an open drain master device connected to one or more open drain slaves. A single pull-up resistor is common to all devices and acts to pull the bus up to 3 or 5 volts, and may provide power to the slave devices. Communication occurs when a master or slave asserts the bus low, i.e. connects the pull up resistor to ground through its output MOSFET. Specific 1-Wire driver and bridge chips are also available. Data rates of 16.3 kbit/s can be achieved. There is also an overdrive mode which speeds up the communication by a factor of 10.