In designing a digital pll, I'm facing a problema with a communication delay between the loop filter output and the frequency synthesizer (via SPI).
If I dont consider the communication delay the system suffer with a high overshoot, long stabilizing time or no synchonization at all.
Its a classical design: ref_in –> phase_detector –> PID –> SPI_controler –> frequency_synth –> phase_detector
Any tips would be very appreciated.
Best Answer
You need to incorporate the delay in your transfer function \$H(z)\$. If the delay is a multiple of the sampling period, then the delayed transfer function is simply $$H(z) z^{-m}.$$
If the delay is not a multiple of the sampling period, you can do a couple of things. Firstly, it is probably a good approximation to select the closest multiple of the sampling period. Secondly, you can use the advanced z-transform, which is given by $$F(z, m) = \sum_{k = 0}^\infty f(Tk + m) z^{-k}.$$ If the delay \$m\$ is a constant, which it will be in your case, then the advanced z-transform has the same properties as the z-transform.
It is important to check the controllability matrix when you have a significant delay. It can render the system uncontrollable in certain situations.