pcb-design
I create one 4-layer board using Altium's PCB Wizard . By default, it set the plane pullback to 0.5mm, the keep-out area is 1.3mm from the board edge. That is, the top/bottom layer keep-out region is less then the power/ground plane, as below, the red layer are the power plane, and the blue one is the top layer pour.
Is it a good design considering EMC?
This is a 2014 post, but I just run into it. I cannot view the datasheet link for the wifi module, but I'm working on a design using BLE module (Silabs BGM111). On manufacturing datasheet, the layout recommendation should also apply to a wifi module. To answer the original questions, I don't think copper would block signal completely, but it will degrade the signal strength. Depending on your module antenna design, this copper/plastic clearance in 3D space can be different as well.
At connectors narrow traces are used to connect terminals to the planes to allow wave or hand soldering to heat the joint sufficiently, if oven reflow soldering is used instead these thermal releifs are not needed. as the thermal releifs are symmetrical they do not have a dipole moment and thus do not radiate significantly.
There's nothing that two ground planes can do that one ground plane and one correctly bypassed power plane cannot do better.
if you need to split the power plane into regions for different voltages that can work well too.
Best Answer
You don't want the signal lines to come too close to the edge of the ground/power planes and you definitely don't want them to cross over or they will emit EMI.
The default values sound reasonable to me unless you have some kind of special requirements.
The 0.5mm pullback on the planes keeps the copper from showing up on the edges where the boards are routed (as in cut with a router bit) or perhaps pushed up against a metal part (though in the latter case I would add a bit more clearance for luck in case the PCB manufacturer doesn't get the cutting registration perfect).