Electronic – Potential drops in BJT in CE configuration

physicspn-junctionsemiconductorstransistorsvoltage

In a simple p-n junction diode, there is a \$V_{eq}\$, the potential difference between the p-doped and the n-doped portion of the diode. When an external potential \$V\$ is applied in forward bias, and if the entire resistance of the diode is assumed to be at the junction (depletion region), the new potential difference between the p-n junction becomes \$V_{eq}-V\$ and the current is \$I_0(\exp(qV/k_BT)-1)\$(where \$k_B\$=boltzmann constant, \$q\$=carrier charge, \$T\$=absolute temperature). I want to extend this to a BJT.(Bipolar Junction transistor, pnp)

Let us assume we have a BJT in CE(common emmiter) configuration with \$V_{eq}^{BE}=100, V_{eq}^{BC}=80\$ as in image (1). Then the external \$V_{CE}=10\$ is applied as in image (2). (B+base, E=emitter, C=collector)

Does this drop appear completely at the BC junction or partly at the
BE and the BC junction? (as assumed in the image)

Next, if we have \$V_{CE}=10\$ (such that the BC junction is reverse biased) and now we also connect a small \$V_{BE}=3\$.(image (3)). In this case, the potential difference at the BE junction will always be less then \$V_{eq}^{BE}\$ on account of the non-zero forward bias \$V_{BE}\$ and hence will be forward bias (\$V<V_{eq}\$) for any value of \$V_{BE}\$.

Then why do we say that in the cut-off state, the BE junction is also
reverse biased? Will is not be forward biased only?

Moreover, there is almost no current (both \$I_B\$ and \$I_C\$)in the cutoff region, the reason being reverse bias of both the junctions. This should be false, and the absence of current should be due to the fact that the knee-voltage has not been reached for the forward biased BE junction? The three images referenced to in the question is posted below.

schematic

simulate this circuit – Schematic created using CircuitLab

Best Answer

While interesting, your predictions are incorrect.

The cause of your mistake is rooted in the very first paragraph of the question - you misinterpret the meaning of built-in voltage. Allow me to write a step-by-step answer - you may already know most of the theory, but there are others who don't.

Doped Silicon

Without loss of generality let me talk about Silicon.

Doping is a process of adding non-silicon atoms into (otherwise pure) bulk of silicon. The dopants (=atoms which were added) are neutral, therefore the material stays neutral too. However, dopants have very interesting property - each dopant atom contribute one free charge carrier. This charge carriers can be used (and are used) as the main current carriers in semiconductor devices.

"Donor" dopants add negatively charged free carriers - electrons. The resulting material is called \$n\$-type silicon.

"Acceptor" dopants add positively charged free carriers - holes. The resulting material is called \$p\$-type silicon.

Depletion region

When bringing two oppositely doped pieces of Silicon into a contact, the severe difference in free carriers concentrations give rise to diffusion currents (there are much more holes at the \$p\$ side and much more electrons at the \$n\$ side). While free carriers diffuse across the boundary they "leave behind" static dopant ions. The carriers themselves neutralize each-other (recall that they have negative polarities), but the ions stay in their places and give rise to local electric fields:

enter image description here

The diffusion described above continues until the magnitude of the electric field, induced by the "exposed" dopant ions, is just enough to balance the tendency of free carriers to diffuse.

The region containing exposed ions is called Depletion Region. There is an electric field inside this region which prevents from free carriers to diffuse further.

Built-in voltage

Since there is an electric field in depletion region, there is a potential difference associated with this field. This potential difference is called "Built-in voltage" (usually denoted by \$V_{bi}\$; it is this voltage that you call \$V_{eq}\$).

Now is the most confusing fact about built-in voltage: it can't be observed externally. This means that if you take a voltmeter and try to measure the voltage between \$p\$ and \$n\$ sides of the diode when it is in thermal equilibrium (i.e. no external bias) - you'll read 0V.

Wrong interpretation

The first paragraph of your question suggests that you think of built-in voltage as representing the potential difference between the two sides of a diode. This is not the case: the potential difference is 0V in thermal equilibrium, and the built-in voltage only compensates for a diffusion tendency.

However, it is true that when an external bias is applied, the magnitude of the voltage across depletion region is reduced: $$V_{depletion}=V_{bi}-V_{applied}$$

If \$V_A>0\$ (forward bias): the voltage across depletion region reduces and the width of the region reduces. In this case the diode will conduct a forward-bias current which has exponential dependence on \$V_A\$.

If \$V_A<0\$ (reverse bias): the voltage across depletion region increases and the width of the region increases. The diode will not conduct any appreciable current in reverse bias mode.

Now I suggest you'll try to reconsider your models, taking into account that there is no potential differences between between parts of semiconductors devices in thermal equilibrium.