First, let's break down this circuit and see what it's actually doing. L2 is feeding C10 and C11, for the AVdd net, probably for some analog stuff. L1, C12, and C13 are doing the same thing for the DOVdd net, probably digital IO. These have nothing to do with the regulator other than they share a common power source.
That leaves the regulator itself. L3 and C14 form an LC filter on the input with a corner frequency of almost 88kHz. That may, or may not be particularly useful, hard to say without knowing the rest of the design. The same thing is happening on the output. L4, which is actually a ferrite bead, forms an LC filter with C15 and C16. Since a ferrite bead is only inductive to a certain point, that corner frequency could be from here to the moon. This is poor practice. The output cap needs to be right next to the regulator. Having that ferrite bead in between the regulator and output cap could result in poor output stability. If you must filter the output, this way, put an actual LC filter after the the output cap. For a linear regulator, that's not usually necessary, but a SMPS, it can be essential. Use ferrite beads along with the decoupling caps for power feeds to ICs where it makes sense to do so.
Can i change voltage regulator and maintain same inductors
value?
You could, but lower the corner frequency would be preferable.
If i change capacitors value, like from 0.1uF and 10uF to 0.01uF and
2.2uF like i see in other type of power supply of the same module, it change significantly the filter frequencies?
The corner frequency has to change, physics and all. Whether or not that matters depends entirely on the application.
Instead of use 3 inductors, if i use multiple voltage regulators, can
replace them with only 1 inductor at the power supply?
If you want to keep the LC filters and have multiple regulators, it would be pointless to only have one inductor. You wouldn't have an LC filter at that point.
If i want to place a decoupling capacitor for this circuitry, which
value should i use? and which footprint dimension(SMD)?
The input cap is effectively the decoupling cap for the regulator. The datasheet recommends 1uF on the input and output. These should be ceramic and physically close to the regulator. It's also good practice to put some bulk capacitance, 10uF is reasonable starting place for a lot of applications.
You have a 68mH inductor and a 100uF capacitor forming a low pass filter. Well, that is your intention. The problem is that these two components also form a series tuned circuit and this will completely "short" out the AC at 61 Hz. If your AC supply happens to coincide with 61 Hz it's a dead short.
What if your AC supply never rises above 60Hz? The inductive reactance is 25.63 ohms and your capacitive reactance is 26.53 ohms - they are of course subtractive and the net impedance is about 0.9 ohms. On a 220VAC supply this means a current of nearly 250 amps. Not good.
If your AC frequency is 50 Hz the inductor has an impedance of 21.36 ohms and the capacitor has an impedance of 31.84 ohms - net impedance is 10.5 ohms - it's still going to take nearly 22 amps of current and blow your fuse.
You have to compromise or there might be a fire. Choose a resonant frequency that is significantly higher than your AC frequency and if this doesn't provide enough filtering, design a two stage filter or a 3 stage filter.
Best Answer
You're basically asking, how to design a power supply filtering and bypassing network. This question is really too broad to answer completely here, but I'll give some general ideas. Probably other answers will point out issues I've forgotten or alternative solutions.
I'll assume you're talking about a PC board design (as opposed to IC design or chassis system design).
The power supply filter has several responsibilities in your circuit:
Prevent the power supply's noise and interference received on the power supply lines from adversely affecting circuit operation.
Prevent switching noise from one IC in your circuit from adversely affecting it's own operation or operation of other ICs.
Prevent switching noise from your circuit from creating radiated emissions from the power supply lines.
In order to design your power supply network carefully, you will need to model each of the sources of noise, then use calculations or simulations to determine how each contributes to the effects I outlined; then determine a filter topology and component values that adequately constrain these effects.
Roughly speaking, the input (10 uF in your example) cap and inductor in your circuit are responsible for #1; The individual 0.1 uF caps at each IC are responsible for #2; and the 0.1 uF caps and inductor are responsible for #3.
Also, the importance of each issue depends on the details of your circuit:
For a precision analog circuit, be especially wary of source noise affecting the circuit.
For a digital circuit, be especially wary of generated emissions.
For a mixed-signal circuit, consider the concerns of both analog and digital circuits, and also be especially concerned about noise generated by digital circuits affecting performance of analog circuits.
A couple of other considerations:
You mentioned that your circuit uses an inductor in the top arm of the pi. A ferrite bead is often used in this location instead because its less likely to cause an oscillation due to resonance with capacitances in your circuit. On the other hand its often hard to specify a complete model for a ferrite bead and so difficult to predict its behavior with simulation.
You mention a 10 uF electrolytic cap on the input. This is actually not a very large value. I've seen circuits with many 100's of uF in this location. However increasing this value also increases the inrush current drawn from the power supply when the circuit is turned on.
That said, the network you describe is a very common one that will be adequate for many situations. If you have a good reason to improve it, please ask more specific questions and we will try to assist you.