My favorite electronics book is "High Speed Digital Design: A Handbook Of Black Magic". I highly recommend this book. It seems expensive, but it is totally worth the money. This book has 12 pages on choosing a bypass cap! The author, Howard Johnson, also teaches some classes with decoupling caps as one of the topics.
Some important things that I've learned over the years, and have been backed up by this book, is that the "standard practices" with decoupling caps are almost always wrong and there is more art than science when it comes to choosing and routing them.
There are lots of calculations that you can do regarding decoupling caps, but much of those are not accurate due to many things. The caps themselves are vary wildly (especially the higher dielectric caps like X7R). The PCB layout changes things greatly (and you'll need to think in 3-D for this one). Temperature and voltage will change the behavior of the caps. A single cap will behave as both a "power supply smoothing cap" and a "AC signal return bypass cap". Etc.
What Johnson did was, after a lot of experimentation, figure out that inductance is the most important factor and it swamps almost every other consideration. So the goal when selecting and placing decoupling caps is to use a lot of physically small caps, with the highest practical value, and route them so the total inductance is as low as possible.
The ideal would be to use lots of 0.1 uF caps in an 0402 package. Place them under the chip on the back side of the PCB. The cap be routed as in the image below. And the vias go directly to the power/ground planes (not to the chip's power pins, as that would usually increase the inductance). If you place the cap under the chip then sometimes you could share the same via without any issues.
The reason why a 0.1 uF cap was chosen is because it is the highest practical in an 0402 package. The reason why 0402 was chosen is because it is the smallest practical size, and you want to use a lot of them to get the effective ESL/ESR down. Of course all bets are off if you have a 2 layer PCB without power and ground planes.
I don't want to belittle the use of the math, that is important, but the complexity of power supply decoupling and AC return paths often makes the math not so practical in the real world. In the real world, a "rule of thumb" really helps. Of the many rules of thumb for this topic, it has only been Howard Johnson that has proven the other rules don't work and provided this better rule. My experimentation and experiences has shown this to be true.
XL and XC cancel each other in a series resonant circuit but in parallel resonance they produce an infinite impedance.
XL is jwL and
XC is 1/jwC
In parallel they form this impedance: -
Z = \$\dfrac{j\omega L \cdot \frac{1}{j\omega C}}{j\omega L +\frac{1}{j\omega C}}\$
Z = \$\dfrac{j\omega L}{1-\omega^2LC}\$
When \$\omega^2 LC =1\$, the denominator is zero therefore the impedance is infinite.
Best Answer
I didn't watch the video, but I know PCB power/ground planes with small FR4 thickness are very high Q low ESL, low ESR dielectrics and excellent for ripple decoupling.
It is also true that "some" SMPS IC's and MOSFET LDO's have low phase margin when the load Cap ESR is TOO small as the ripple voltage feedback is too low to regulate the voltage error with adequate phase margin.
Of course, having a low-frequency resonance near an operating point of an oscillator like boost oscillators that can run > 1MHz with variable frequency PFM instead of PWM... is not a good design. This could lead to intermodulation or "aliasing" errors or a beat frequency.
Since inductance is due to the physical aspect ratio and inductance increases with L/W ratio which lower the series resonant frequency (SRF). So some caps have intentionally higher ESR for VHF/UHF use to avoid spurious high Q resonances that interact with multiple caps in parallel.
However, the problem you state in the question is actually a solution called Zero Valley Switching (ZVS) type buck converters that regulate at minimal losses on a pulse to pulse basis. It is not just close but actually IS the resonant frequency of the LC components chosen.
Learn as much as you can about component Q's and how this affects Bandwidth, rise time and overshoot. Component Q's must also be greater than a circuit resonant Q's when this desirable like crystal filters or microwave LC ladder filters.
Learn as much as you can about impedance ratios vs f in analyzing any reactive parts.