Electronic – Pulse reset line with long press of a button

delaypulsereset

This question is a variation of How to trigger reset at long press of button.

Namely, I need to pull down a reset line with a short pulse of X length, if a button is pressed for Y>=X or more seconds. To be clear, I need for the reset line to go low for X seconds and then go up again without having to depress the button (this is different to the cited question, since I can't rely on the button being depressed for the signal to go up again).

To give some example values here, suppose I want to bring the reset line to low for 5uS if a button is pressed for 5 seconds or more. It is acceptable if the this 5uS pulse gets generated every 5 seconds for as long as the button remains pressed (i.e. a pulse train), but generating a single pulse is all I really need.

One way to achieve this would be using a pulse generator IC, or other specialized IC's. However, ideally I would like to do it using only simpler components (Rs, Cs and perhaps a transistor or mosfet if required).

Best Answer

I've done this on multiple products to give a short pulse on the reset line once, no matter how long the button is pressed. In my case VDDS is a 3.3V rail, and nRESET is the reset line to the MCU.

  1. Start with power on, button not pressed (open).

    a. nRESET is pulled high through R1.

    b. C26 has 0V across it.

  2. When button is pressed, the node of R4 and C26 is grounded.

    a. Since the voltage across a capacitor can't change instantaneously, C26 will pull nRESET low as well.

    b. C26 will begin to charge through R1. The time it takes C26 to charge will be dependent on the value of R1 and C26. This RC time constant as well as the IC's VIL threshold will determine the low pulse time. The voltage across C26 will eventually charge to VDDS as long as the button is held.

  3. When the button is released, the node of R4 and C26 will be pulled up to VDDS through R4.

    a. This will cause nRESET to try to jump up to VDDS + the charge across C26 (which is VDDS). This would be 2X VDDS, which may exceed the voltage rating of the IC. This is the reason for D1 to clamp the voltage at nRESET to a safe level.

  4. C3 is present to provide high frequency decoupling of the nRESET line, and may or may not be needed, depending on the application.

As mentioned above, tuning of the timing of the reset pulse can be accomplished through changing the values of R1 and C26.

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