I want to use an FPGA to generate quadrature modulated signals for use with an RF transceiver (something like MAX2828 ).
I am confused specifically about how the digital to analog modulation should be done.
Please correct me if this is not accurate, but the symbol rate will be the same as the frequency of the IQ waveforms, so 1 symbol per Hz? so 1 amplitude change per oscillation of IQ.
Assuming I am generating the quadrature cos/sin waveforms from the FPGA via a DAC, if I wanted to modulate the amplitude of I/Q from the digital data, the clock rate the the digital bit will be the same as the frequency of the IQ waveforms.
If this is the case this would surely lead to abrupt changes in the amplitude of the IQ waveforms. Am I meant to digitally low pass filter the output such the the DAC outputs a smooth continuous waveform, or is there meant to be some low pass filter after the DAC to smooth out these abrupt changes?
Best Answer
No, usually you count the transition between any two symbols as a half-cycle, so it ends up being 2 symbols per complete cycle.
Regarding turning the data into actual waveforms, you would normally oversample the I and Q signals, so that the DAC sample rate is many times higher than the actual data rate. This allows you to do much of the pulse shaping (filtering) in the digital domain. Then, the analog-domain filter is only required to remove high-frequency images created by the DAC itself, a much simpler problem.