Electronic – Question about MOSFET behavior

mosfettransistors

I tried to simulate a circuit with mosfets in LTspice, but it's still hard to understand how they work

enter image description here

What I observed:


For N-channel MOSFETs (as in the picture above)

a) Current flow through N-channel MOSFET transistor

  1. Does not depend on V1's voltage
  2. Depends on V2's voltage
  3. Does not depend on the current charging the gate (from V2)

b) Voltage across R3 is never higher than V2 – V1 (even if R3 resistance goes to infinity) and it doesn't depend on the V1's voltage.

c) The current charging the gate is extremely low (about 0.0002fA).


For P-channel MOSFETs

a) Current flow through P-channel MOSFET transistor

  1. Does not depend on V2's voltage
  2. Depends on V1's voltage
  3. Does not depend on the current charging the gate (from V2)

b) Voltage across R3 is almost equal with V1's voltage

c) The current charging the gate is extremely low and it's not constant.


Please tell me if I said something wrong.


EDIT:
The only thing I don't understand is, considering the schematic in the picture above, why does the voltage across R3 can not be grater than 8V, no matter how big R3 resistance is? I expected it to be 9V with a big resistance.

Thank you for your answers!

Best Answer

I'll just answer the NMOS part of your question. The answers for PMOS are similar, so the explanation should carry over.

a) Current flow through N-channel MOSFET transistor

  1. Does not depend on V1's voltage
  2. Depends on V2's voltage
  3. Does not depend on the current charging the gate (from V2)

As long as you are operating the MOSFET in saturation, this is exactly what you expect. The relevant graph from the datasheet for your device is this:

NMOS transfer function

When the gate-source voltage (in your schematic the voltage between N4 and N5) is high enough, only the gate-source voltage has a strong effect on the current through the MOSFET; the drain-source voltage (controlled by V1 in your circuit) has very little effect.

If you reduce V2 low enough, and by small enough steps, you should be able to trace out the roll off in the triode region, where both V1 and V2 will affect the current.

c) The current charging the gate is extremely low (about 0.0002fA).

This is exactly what you should see. The gate of the MOSFET is effectively a capacitor, and at DC will conduct almost no current.

b) Voltage across R3 is never higher than V2 - V1 (even if R3 resistance goes to infinity) > and it doesn't depend on the V1's voltage.

Again this is roughly what you should see, but V2 - V1 is not the relevant parameter, the threshold Vgs of the FET is. If R3's value is increased at constant current, it will reduce the difference between N4 and N5 voltages. That is, it will reduce the gate-source voltage of the MOSFET, until Vgs hits its "threshold" when the FET pretty much stops conducting altogether. So if R3 goes infinite, the MOSFET is shut off, and no current flows through R3. Despite R3 having a very high value, the voltage across R3 then becomes 0.