If you use KVL in the other loop (36v i5 and i2) then use that, the other kvl equations and two of the kcl equations it should work.
Adding all the kcl equations should give 0=0. They don't include the voltage so they can't actually solve for anything here.
Using star-delta transforms and mesh analysis can make it a bit easier to solve (transform the delta that doesn't have I1 in it to a star/wye).
1) The article says T5 serves as a surge protector. But if the gate is connected to the bottom of RS (RS-SEL in this schematic), wouldn't the
Vgs of the JFET be 1V? Therefore, the FET would never turn on under
normal conditions, which kind of defeats the current source? I'm
obviously missing something.
They're pulling a bit of a trick here — a JFET can also function as an ordinary diode. For example, look at T9 down below. If a positive surge is applied to K2, the gate-channel junction of T5 will be forward biased, which connects it directly to the output of the opamp, a low-impedance point.
The advantage of doing this is that in normal operation, T6 has very little leakage and very little capacitance, so that it doesn't disrupt the low-current settings.
Remember that a JFET is a depletion-mode device. It will conduct current unless the gate is driven more negative than the channel (relative to either the source or drain terminal) by the specified threshold voltage. With a VGS of -1V, the FET still conducts. The drain-source resistance doesn't upset normal operation because of negative feedback, IC6 will raise its output voltage to the level required to force the desired current through RS.
2) According to the article, all of the source current from IC6 travels through R59 as long as the user-selected current is 100uA or
less. I believe I understand that because at 100uA, Vbe of T6 would be
360mV, which is less than Vbe(on) for T6, so T6 would be off. But
wouldn't R59 contribute a very large error in series with R28? The
combined resistance of R59 and R28 is 13.6k, which would result in a
current of 1V/(10k+3.6k) = 73.5uA. That's pretty far from 100uA.
No, because R59 is inside the feedback loop for IC6, the opamp automatically compensates for its effects.
3) For user-selected currents above 100uA, how does R59 and T6 affect the voltage going into the resistors downstream? Wouldn't they
contribute significant voltage drops that mess up the 1V reference
calculations? I can't figure out an intuitive feeling for how the
resistor and transistor work together here.
Again, because of negative feedback, when T6 conducts, IC6 reduces its output voltage to maintain the correct voltage across RS.
The general principle is that components between the output of the opamp and the feedback point don't matter (within certain limits), because the opamp will act to reverse their effects and maintain the desired voltage at the feedback point. It can be tricky sometimes to understand exactly where the "feedback point" is in some circuits. In this case, it is the node labeled TP6.
Best Answer
Your professors analysis and lecture is very good. Your question above is out of context and as such you've really kneecapped anyone who is going to analyze it without them understanding that this is really just part of an analysis and rationale for how you do small signal analysis. He is taking you through replacing the non-linear elements and substituting in the small signal equivalents (all lower case letters as is the convention).
I would recommend going back to ~ 18 minute mark and listening carefully.
He has removed the large signal currents (capital letters above - as is the convention) because they represent the operating point (or network bias). When you are doing small signal analysis you don't consider those currents you only care about the incremental (small signal) currents and voltages. His approach is a more rigorous (i.e. proper) derivation.