Electronic – RSBMI instruction in ARM

Are you running code from RAM or from flash? ARM processors that run code from flash often require wait states in at least some circumstances; such processors often include hardware which can eliminate most of the wait states in common code, but such hardware may be as simple as a single-line buffer which allows an access to the same line of flash as the previous access to avoid the wait state. If the branch target is the last word of a flash line, then the flash would require two or three cycles to fetch that word, and two or three cycles to fetch the following word. If one of the cycles is performed concurrently with some other CPU operation, that would leave a three-cycle penalty.

An ARM processor can not execute arbitrary sequences of interleaved ARM and Thumb instructions. It has to be switched from one instruction set to another, e.g. through a branch instruction. So most of the time you tell the compiler to use either ARM or Thumb instructions throughout your project. The best the compiler can probably do is to decide on a function-by-function basis which instruction set fits best. The Thumb2 instruction set is supposed to combine the advantages of ARM and Thumb without the drawbacks.

Edit:

The answer to the question @Kynit linked to basically also states the above.