I was going through SATA3 spec. As per the spec, both scrambler and 8b/10b encoder are used in its design. Scrambler helps randomizing the data while 8b/10 encoder creates enough transition for DC balance and clock data recovery.
My doubt is that if the scrambler randomizes the data, then it should solve the purpose of DC balance and clock data recovery, because transitions of '1' and '0' are being created by the scrambler. What is the need for 8b/10b encoder then?