Electronic – Selection of PWM switching frequency in BLDC motor

There are design considerations which could be viewed as a workflow when settling on the PWM frequency. What is the end goal of using PWM? to control the current in the stator of the electrical machine and controlling the current is all about tradeoff's

Ripple current needs

During your system design you will need to consider what ripple current your system can tolerate. The load is essentially a voltage source in series with an inductor and a resistor & thus \$ V = L \frac{di}{dt}\$ is one of the main equations to consider.

Higher ripple current equates to higher torque ripple. A BLDC electrical machine excited with a quasi-squarewave will already have higher torque ripple than one excited with a trapezoidal waveform and higher still than a BLAC machine. Higher ripple due to lower PWM will further increase the torque ripple.

Likewise higher ripple will increase the RMS current through your switching devices and your stator (rms = 0.557*Pk + DC).

Initial thinking would therefore imply: increase switching frequency as high as possible!!!! besides other considerations to be covered later, what can be seen is... for a given forcing voltage & a given load inductance... at some point an increase in switching frequency provides no additional benefit... Why switch a 1H inductor at 1MHz when the resultant current ripple (that can be sensed) is no different than if you switched at 2kHz

The load inductance and system needs should provide you with "ballpark" range for the minimum and maximum switching frequency to consider. Low end driven by maximum ripple allowance, high end driven by pointless switching.

Bandwidth of the control

As mentioned the aim of using PWM is to control the current in the stator. How well this current is controlled is system-dependant. A general rule of thumb in control is inner loops should have a bandwidth a factor of 10 higher than the outer loops. If a motor is to rotate at 3000rpm (50Hz) and is a single pole-pair topology such that the electrical frequency is also 50Hz... what use is a PWM frequency of 1MHz if you only need to synthesis a waveform with a fundamental of 50Hz? 500Hz would be a "rule of thumb" minimum to reconstruct a waveform with reasonable fidelity.

This value could be considered your absolute minimum before possible control problems could arise.

Power loss consideration

The last two points would all swing the decision to higher switching frequencies (but not ridiculously high because that is a complete waste)... Higher switching frequencies reduces the RMS current, improves the synthesised waveform etc...

However, there are the power electronic losses to consider. The increase in switching frequency increases the switching losses of the inverter

\$P_{on} = E_{on}*f_s\$.
\$P_{off} = E_{off}*f_s\$

Of the gate drive resistor

\$P_{DRV} = Q_{g}*V_g*F_{s}\$

The gatedrive etc. All these essentially limit your maximum PWM frequency

Control considerations

To control a motor, relatively speaking, a lot of calculations must be performed between PWM events

1. Velocity feedback must be aquired (assuming velocity loop)
2. Current feedback must be acquired (assuming current loop/protection)
3. PI calculation for the velocity loop (if present)
4. PI calculation for the current loop (if present)
5. PWM generation & commutation calculation.

If you were to have a PWM frequency of 1MHz for instance, your controller clock may need to be orders of magnitude higher to service everything that must occur.

Knowing the minimum that your system can tolerate with a target maximum provides you with flexibility to decrease the switching frequency if there are thermal considerations, EMI considerations, computational overheads.

A reasonable starting place is to consider a 10kHz switching frequency and determine what your ripple current would be, what your synthesised waveform at maximum velocity look like, what cooling you would require.

It may turn out that a 1st pass design shows that 10kHz is more than enough, it may show it is too high from a thermal point of view and thus SVM or superH PWM stages could be considered to increase the apparent switching frequency while reducing the power electronic switching frequency