switch-mode-power-supply
I am pretty new to SMPS circuits. I understand there's a bleeder resistor, a flyback diode circuit to power the transistorized osc circuit. I guess that the current around the MOSFET will be like a pulse train.
Q1: What is the role of R1, D1 & C1? Is it a buck converter? Does D1 ensures biasing to R1 is not disturbed?
Q2: What role does R2 play? Restrict current to the MOSFET and biasing?
Q3: Does C2 block the biased DC voltage from entering the fly-back circuit?
D1 is in the wrong place (on the circuit diagram at least) - it should be on Q4's drain and then to ground/0V - sort this out, let us know what happens and consider using fewer words to get a better response - I read this a while back and lost the will to survive, entered a coma but recovered a few minutes ago!!
Honestly dude - stick to the business and you'll get better answers (and a bit quicker too).
Trying to get an N channel working can be tricky given the supply bootstrapping required. I think you should try something else first (and this will potentially teach you more about this type of circuit). This would be a natural progression in my book....
At the moment, I think your regulation technique works by pulse skipping i.e. when the output voltage is high enough (despite the diode in the wrong place), you kill pulses on their way to Q3 by shorting its gate with Q2. Instead, try setting up the 555 to have a variable duty cycle (instead of fixed) and avoid pulse skipping - variable duty cycle will give better ripple voltage and I think it's more important than trying to replace the P channel with an N channel - there are plenty of buck regulators using a P channel for Q4. OK maybe Linear tech tend to use N channels on a lot of devices (with bootstrapping) but it's no shame using a P channel and building from scratch.
There are of course, plenty of bucks that do use pulse skipping but better performance is from PWM/duty cycle modulation. If you get that going then try using an N channel FET to replace the flyback diode (D1, the one that appears to be in the wrong place on the circuit). That gives you a synchronous buck converter and better efficiency.
If I've misread your diagram, don't be shy, tell me (in few words but with accuracy).
Here's a slightly shrunken version of your circuit with letters A, B and C in red on it: -
I'm not ruling out that there are other problems but B and C are the glaring ones. I'm also unclear about what you are referring to when you mention letters A and B.
Best Answer
It's a flyback converter and R1, D1 and C1 are there to catch unusable energy when the MOSFET opens. The unusable energy is because only about 95% of the magnetic energy is usable in the secondary. Without those components there would be a sizable back emf and more than likely, the MOSFET would smoke on over-voltage.
When the MOSFET turns on, current ramps up through the transformer primary and can hit saturation limits if this isn't taken care of. The voltage across R2 starts to turn on the NPN transistor when current is hitting the allowable limit and this mechanism stops current rising any more.
This is a bit trickier to figure out. Bear with me...
I believe it turns the MOSFET off rapidly - the tertiary winding is rectified by the BA159 diode and smoothing is performed by the 47 uF capacitor on the "dot" pin of the tertiary. This sets a smooth positive voltage across the 47 uF capacitor and this largely remains so while the SMPS is running. However, when the MOSFET starts to turn-off that tertiary winding will reverse the voltage across it and rapidly pull down the bias to the MOSFET via C2.