PWM – SPWM vs 6-Step PWM vs SVMPWM

If you have resistors from red to blue, from blue to yellow and from yellow to red (i.e. a delta formation load) then the power is the sum of the individual line voltages (squared) divided by the individual resistance across each line:

$$P = \frac{V_{RB}^2}{R_{RB}} + \frac{V_{BY}^2}{R_{BY}} + \frac{V_{YR}^2}{R_{YR}}$$

If you have resistors in a star formation this is more difficult unless you have a neutral wire commoning the three resistors. If you do then measure the individual phase voltages and do individual power calculations then add the three powers to give total load power.

If you don't have a neutral then you will have to calculate the star-point voltage relative to red, blue and yellow respectively. Then you'll have three voltages and three resistors and power is the sum of the individual powers.

Here is some references of MCUs with high PWM outputs (> 12)

• Freescale Kinetis K10 @ 120 MHz series (ARM-Based) : 2x8ch + 2x2ch = 20 PWM channels
• A small number of dsPIC33 have a high number of PWM output:
  • dsPIC33EP256MU814 : up to 30 PWM outputs
  • dsPIC33FJ64GS610 : up to 22 PWM outputs
• Atmel 32-bit AVR MCU have some references with high PWM outputs:
  • ATUC256L3U : up to 36 PWM channels

But as Wouter van Ooijen said in a comment, maybe you should review your architecture and instead of using one big MCU with many PWM outputs, you should use one small MCU for each "component" (SMPS, motor, etc.), and use one big MCU for the general control of all other MCUs. This will lead to a more flexible design: you can add a motor simply by adding a small controlling MCU and linked to the big one in SPI or I2C.

For the CPLD/FPGA approach, you can take a look at Lattice ice40 CPLD and to this reference design : MxN Channel PWM Do some searchs about PWM on Altera and Xilinx website to have other CPLD references.