Electronic – standard I2C/SM bus protocol for laptop battery packs

Your problem can be solved with SMBus which is logically an extension on I2C. SMBus supports an ARP, wherein it can detect multiple IC's of same address, and assign them a different address. The ARP process basically reads a UUID ( a unique id per device; all the different devices in the same lot will have a different UUID) from the slave address (there may be multiple devices on this slave address). Due to the I2C bus arbiration process, only one slave will succeed at a time, and the master successfully reads its UUID. Then the master assigns a unique address using that UUID as reference. The process is repeated until all the slaves get a resolved address.

That depends on how much of I2C protocol is implemented in your Arria controller. If it is just reporting the "events" to the program (like "STOP detected", "START detected", "ACK received", "Address received", etc.), then most probably you will be able to implement most of the SMBus, except for maybe ARP which requires, AFAIR, responding to a broadcast address (which your controller may not have support for). The other concern is timeouts. SMBus have stricter timeouts, especially in regard to clock stretching. Compatibility would highly depend on the extent to which the master uses the SMBus protocol and expects conformance.

On the other hand, if your Arria provides a higher level abstraction (like "Send I2C byte"), then it most probably will be a show-stopper.

If you have any evaluation board for your Arria 10 FPGA, I would recommend testing the concept using that board before you go with this chip for design and production.