I am looking at using the STMF103RB ( ST product page ) for a use case involving being asleep for 1 second and UARTing 500 ADC samples and then going back to sleep. I have a 50mAh battery and need it to last atleast 10 hours, i.e. 5mA average.
- Sleeping – sample ADC at 500Hz, with an ADC sample time of around 5us and DMA this into a memory location.
- Awake – UART these 500 samples as fast as possible and go back to sleep.
My problem lies in estimating the minimum clock speed required to process this to estimate battery life. If I plan on using the ADC at a sample rate of 500Hz, a sample time of 5us (lets say 8 cycles) and the ADC takes ~12cycles to convert = 20 cycles, lets say 30 to be safe. Does this mean the clock can be at (30*500 = )15kHz whilst asleep to do this? Is it possible to find out if this okay for the DMA too by calculation? This clock speed in sleep would put it <1.08mA typical current (according to datasheet) and give me more than enough legroom to UART for a short time.
Similarly if I want to UART at 115200 Baud, does this mean my min. AHB and APB clock speed is 115.2kHz? Or is this simply too slow for the processor to process its code too?
Best Answer
No. The USART performs 16x oversampling; the baud rate is given by:
$$F_{CK} \over 16 \times \mathrm{USARTDIV} $$
As the minimum value of
USARTDIVis 1, the peripheral would need be clocked at a minimum of 1.8432 MHz (16 × 115.2 kHz) to run at 115.2 kBaud.Additionally, keep in mind that using a USART divisor of 1 leaves you no room to tune it -- if your system cannot generate a peripheral clock of exactly 1.8432 MHz, you may need to increase the peripheral clock to make it possible to derive an appropriate USART clock.
Finally, consider that the USART also supports DMA -- it's possible to output data over the USART while the CPU is sleeping. You'll only need to wake the CPU for as long as it takes to convert data from the ADC buffer to the format you want to output on the USART and set up DMA.