Electronic – STM32F103 PLL Ready Flag Never Set

armpllstm32stm32f10x

I am trying to set PLL as my system clock source upon startup of my microcontroller, STM32f103

I have commented all the defines in my system_stm32f10x.c

/* #define SYSCLK_FREQ_HSE    HSE_VALUE */
/* #define SYSCLK_FREQ_24MHz  24000000 */ 
/* #define SYSCLK_FREQ_36MHz  36000000 */
/* #define SYSCLK_FREQ_48MHz  48000000 */
/* #define SYSCLK_FREQ_56MHz  56000000 */
/*#define SYSCLK_FREQ_72MHz     72000000*/

So my system starts with hsi(8Mhz) as the clock source. This I have verified to be working just fine. However when I try to initialize pll to set it as the clock source, the PLL Ready flag never sets.

//on boot the system core clock is set
//HSI @ 8Mhz. Set this to PLL with PLL source HSI
//to get the max sysclock of 64mhz

//ensure hsi is ready
while(RCC_GetFlagStatus(RCC_FLAG_HSIRDY)!=SET);

RCC_PLLCmd(DISABLE);
RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_16);
RCC_PLLCmd(ENABLE);

printf("1");
//wait till pll ready
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY)!=SET);
printf("1");

//configure sysclk to use pll
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

//after changing clocks ALWAYS call this function to update
//the system clock variables
SystemCoreClockUpdate();

When I debug my code, I only get '1' in my debug output window which means the pll ready flag never sets.I have tried with lower pll multiplication factor with same result.

Any idea what could be going wrong here?

Best Answer

Managed to solve the issue.

Changing Flash Latency to waitstate 2 (as described in STM32F103C8T6 Reference Manual page 57) fixed the issue.

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Electronic – Stm32f discovery internal clock

OK I figured it out. There is a mistake in the STM32F4xx_spi.c Peripheral Driver file that doesn't allow the use of the HSI(internal clock) value needed for calculating the appropriate divider and odd values for the I2SPR register. (see the last line) I changed it to:

  i2sclk = (uint32_t)(((HSI_VALUE / pllm) * plln) / pllr);

and now it works. Hours wasted as usual!! The clock configuration tool is also wrong as it creates a message in the system_stm32F4xx.c file that states

*        To achieve the following I2S config:   |
*         - Master clock output (MCKO): ON      |
*         - Frame wide                : 16bit   |
*         - Audio sampling freq (KHz) : 48      |
*         - Error %                   : 0.0186  |
*         - Prescaler Odd factor (ODD): 0       |
*         - Linear prescaler (DIV)    : 2       |

which conflicts with the programmers reference that ODD=1 and DIV=3 for 48kHz sample rate, which is correct.

/* Get the PLLI2SN value */
plln = (uint32_t)(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6) & \
                  (RCC_PLLI2SCFGR_PLLI2SN >> 6));

/* Get the PLLI2SR value */
pllr = (uint32_t)(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28) & \
                  (RCC_PLLI2SCFGR_PLLI2SR >> 28));

/* Get the PLLM value */
pllm = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);      

/* Get the I2S source clock value */
i2sclk = (uint32_t)(((HSE_VALUE / pllm) * plln) / pllr);

Setting stm32f4 SystemCoreClock to 100MHz but can’t get it (only get 57.6MHz)

It works now, here is the new code:

{
    RCC_DeInit();//a must
    do{
       RCC_HSEConfig(RCC_HSE_ON);
      }
     while (!RCC_WaitForHSEStartUp());
     RCC_PLLConfig(RCC_PLLSource_HSE, 4, 200, 4, 4);//100MHZ

    do{
       RCC_PLLCmd(ENABLE);
      }

   while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY)!=SET);
   RCC_HCLKConfig(RCC_SYSCLK_Div1);
   RCC_PCLK1Config(RCC_HCLK_Div4);
   RCC_PCLK2Config(RCC_HCLK_Div2);

  RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
  SystemCoreClockUpdate();
}

With some experimentation and some more time reading the stm32f4xx_rcc.c, I discovered there was in fact a function: RCC_WaitForHSEStartUp(), which role is to wait for the HSE oscillator to start. I used it as follows:

do{
           RCC_HSEConfig(RCC_HSE_ON);
  }
         while (!RCC_WaitForHSEStartUp());

to replace in the previous version

do{
          RCC_HSEConfig(RCC_HSE_ON);;

  }

          while(RCC_GetFlagStatus(RCC_FLAG_HSERDY)!=SET);

I also "had" to start the code by initializing the clock system using the function:

 RCC_DeInit();

Best Answer

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Electronic – Stm32f discovery internal clock

Setting stm32f4 SystemCoreClock to 100MHz but can’t get it (only get 57.6MHz)

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