I am about to write a TCP/IP stack in Verilog. I would have thought this was a relatively common thing, and that implementations would readily be available online.
The obvious Google search for a TCP/IP implementation in Verilog does not point to many solutions. Are there ready and tested TPC/IP implementations written in Verilog for FPGAs?
Best Answer
They exist, but aren't likely to be free. Typically a processor handles TCP/IP. It may get a hardware assist from hardware, for example the checksum.
An example of a non-free one is from Hitech Global. It is available in Verilog or netlist. Comblock has one too, but in VHDL, not Verilog.