What is the voltage of "high" signal on "out" pins? Do I understand it correctly, that it is dependent only on provided Vdd and it is a little (approx. 0.5 V) lower than Vdd?
Electronic – the voltage on CD4017 outputs
cd4017
Related Solutions
The 4017 is clocked on the rising edge, and you have the clock line high when it comes out of reset.
Try connecting clock in to Vdd and the 555 output to inhibit in. Inhibit is just an inverted clock input (sans Schmitt trigger). Or add an inverter between 555 and clock in.
In general this is a really crummy reset circuit - criminally bad for anything important. Use a reset (supervisor) chip that provides a sharp fixed-length reset pulse out (eg. 200ms) and also detects slow brownouts and slow Vdd rise. They are plentiful and cheap, and designing one that is bulletproof is non-trivial.
If you insist on using this circuit, at least add a few K resistor in series with the reset input. Otherwise shorting or putting a heavy load turning Vdd off could damage the chip by discharging the 4.7uF through the input protection diodes.
Edit: Rough schematic showing supervisor chip ADM803/ADX803, you may want to add a power-on LED or resistor from Vdd to GND to help discharge the 5V faster so it resets reliably on a short power interruption.
I am not sure that your polarities and values are correct but the idea I get from analyzing the circuit, is that it triggers the transmitter, turns on the echo line and waits for the receiver to detect the echo to turn off the echo line. The counter starts counting at the rise of the echo line and stops at the fall of the same line. So essentially you have a count proportional to the time it takes the signal to propagate and its echo to return. If you "calibrate" this, you have a distance measuring device, or a type of alarm.
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Best Answer
CD4017 is a CMOS device, and as such, the output high voltage will be essentially the rail voltage when the output is sourcing no current.
The output impedance is essentially resistive for small output currents, and the voltage drop with respect to the rail will be more or less linear with current. The datasheet specifies the minimum output current when you have a drop of 500 mV, at least for rail voltages of 5 V and 10 V.
Although it has graphs of output current versus output voltage drop all the way down to the other rail, these should be regarded as transient figures, useful for seeing how fast a capacitance will be charged by the output, rather than as recommendations for what continuous current can be drawn.
The datasheet will have a graph of voltage drop versus output current.