Electronic – Top GND flood and Stitching Vias vs. Via in pad to ground plane

high speedpcb

I recently watched an Analog Devices youtube video which advocated for high speed PCB ground connections to be made with a via in pad to the ground plane, as opposed to a signal layer ground flood stitched to the bottom ground plane with vias. Then, I watched another video which advocated for a top ground flood with stitching vias spaced at lamba/20 (wavelength of highest signal frequency). Which approach is more effective? Please note that I am a student and cannot manufacture PCBs with blind and buried vias. I also do not have access to impedance controlled PCBs; the best I can do is FR408.

Here is a screen shot from the video, and a link to the video for those who are interested:
enter image description here

https://www.youtube.com/watch?v=6jrVZu7eqiw

Best Answer

Which approach is more effective?

You can have both. Via in pad from the ground pads directly to the ground plane, and a ground area on the outer layer connected to the inner layer ground with stitching vias.

Please note that I am a student and cannot manufacture PCBs with blind and buried vias.

Blind and buried vias are a separate concern from via-in-pad. Via in pad can be designed with through vias. It does require extra process steps (via filling and plating over) and does add to the board price.

I also do not have access to impedance controlled PCBs; the best I can do is FR408.

  1. Even many low cost PCB vendors now offer impedance control. You will of course pay a price premium for this feature.

  2. You can design impedance controlled traces on FR408. If you design the correct trace width, you will get roughly the correct impedance. Of course there might be some error due to over or under etching, that your vendor will not be responsible for if you don't pay them for impedance control.

Whether approximately controlled-impedance traces and slightly higher ground inductance due to not using via in pad is acceptable for you depends on what you're designing, what frequencies are present in your signals, and how much ground bounce your chips can tolerate without performance degrading below whatever levels are acceptable for your application.