Electronic – TTL NOR Gate analysis

It looks like you have a NOR gate now, albeit non-standard RTL input levels. TTL is two diode drops and HCMOS is Vcc/2 threshold. The saturated gain of a transistor is only 10 to 20. So choose R values for a gain of 10 for reliable current switching.

CMOS NOR Gate

This is a simplified CMOS NOR gate with fancy triangular inputs running at 100 & 110 Hz to give a 10 Hz beat frequency on the output. Purpose is to show the linear input threshold. This uses n and p Mosfets to give low impedance for both output states, although the high side usually has a resistor to current limit it.

Inverting the collector current equation:

$$i_C = I_Se^{\frac{v_{BE}}{V_T}}$$

yields:

$$v_{BE} = V_T\ln{\frac{i_C}{I_S}}$$

For example, let

$$V_T = 25mV$$

$$I_S = 1 fA$$

$$I_C = 1mA$$

With these values, find that

$$V_{BE} = 0.691V$$

Now, double the collector current and find that

$$V_{BE} = 0.708V$$

Increasing the collector current 100% only increased the base-emitter voltage 2.45%

So, while it is not true that the base-emitter voltage is constant, it is not a bad approximation to consider it constant over a relatively wide range of collector current.