The table 8.1 in UL840 doesn't consider clearances for voltages less than 50V (for example). I have to use a clearance of 0.2 mm on the PCB for the case of overvoltage category 1 and pollution degree 2. This is a problem indeed, since the distance between the microcontroller pins is only 0.175 mm. The standard doesn't say I am allowed to extrapolate. Does anyone know how to deal with this problem of UL 840 not considering voltages less then 50V?
P.S.: Coating could be a solution but I don't want to use it since it's expensive compared to the price of the electronic.
Electronic – UL 840 clearances
12vclearanceul
Related Solutions
KiCad (version 5) works on a maximum required clearance model. That means that it will select the smallest clearance possible from the combination of requirements. In your case, although your pad has small enough clearance, I suspect that your zone fill has a higher clearance set.
In the image below, you'll need to set two things: the clearance and the minimum width. Because you want the copper to flow between the pads, you'll need the width to be smaller than the space available between pads (when including their clearance.
You said that you don't want this to affect other things on the board. In that case, you can set the minimum clearance for other elements using the "Design Rules -> Net Class Editor" clearance setting. Then, as long as your other footprints are set to a clearance of "0" (and their pads are set to "0"), it will use the netclass value.
Viewing the Soldermask
To view the soldermask, you need to have the soldermask layer enabled (and probably selected). The check-mark enables it but because it is drawn behind the pads, they typically obscure the layer unless you also click on it to make it the front-most layer drawn.
I've wondered about this myself.
What I ended up doing for a 230VAC mains project: I created a custom footprint for the TO-220 part, where I moved the outer two legs out to approximately a 4mm pitch (up from 2.54), and the center leg forward. Then I routed slots in the PCB between the pads for additional creepage distance.
This won't change the creepage on the part body itself, but at least it will get the best possible isolation on the board:
You'll need to bend the TO-220 legs when assembling. This is perfectly doable for small manual assembly runs, but I suspect it doesn't lend itself well to large-scale production.
The better solution for high voltages is probably to use a larger part, like a TO-247, which naturally comes with a 5.44mm pitch. That should easily allow routed slots between the pads:
(image from Infineon)
Best Answer
I believe you are misapplying this table.
Instances where clearance (and creepage) is a concern are where the voltage/power source can be a shock or fire danger to the user. If your 5V is created by an internal regulator, then you don't need to worry about clearances to other traces powered by the same 5V regulator. Trace spacing at these voltages is more a function of PCB technology. That's why your microcontroller spacing is less than 0.2mm; it's more than enough.
Tables like you're dealing with are commonly (but not exclusively) applied to instances where you're dealing with mains voltage, where some insulation is required to protect the user from transients and the resulting stress on insulation. Certainly you can have a hazardous 5V rail if it's capable of overvoltage transients, but those are less common.
A final disclaimer: I don't know the full details of your design, and can not be responsible for the safety of your product. The responsibility falls first to you as the designer to determine whether your 5V is hazardous to the user.