Does anybody know if usb super speed enumeration needs the low speed D+/D- lines? I know in HS it first negotiates over low speed then chirps to get to HS mode. However I saw an intel design where they only used the SS lines to connect to a device. Reading the USB spec and then googling up some docs on USB 3.0 enumeration didn't really make it clear.
Electronic – USB 3.x SS enumeration
usb
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There are enough ways available to provide host mode with a microcontroller that trying to do it with something not intended for the role is "doing it the hard way".
Look for devices with USB OTG" = "On the Go" capability.
These can provide either host of slave capability as required.
If "... something like Atmel ATmega32U2 ... " includes an Atmel AT90USB64 , then yes.
ie using one of the available parts that DO have this capability is the "easy way" to go. There are enough ways available to provide host mode with a microcontroller that trying to do it with something not intended for the role is "doing it the hard way". Look for devices with USB OTG" = "On the Go" capability. These can provide either host of slave capability as required.
ICs with OTG capability of some sort
Cheapest in 1's in stock at Digikey:
AVR microcontroller with USB OTG capability $8.43/1 Digikey in stock.
PIC OTG & Host capable microcontroller $4.22/1 in stock Digikey
The PIC device is also the cheapest host / OTG microcontroller of any sort available in stock in 1's from Digikey.
My understanding of the your design is that the entire device is on a single PCB, is within a single enclosure, and is connected to the host by a single USB cable. You've integrated a hub onto the PCB to allow both the devices to communicate with the PC. The following answer will hinge on these assumptions, if it's made of several separate devices connected by disconnectable cables then that changes things.
In this case, I suggest that you simply configure the hub to enumerate as a high-power device, and share the resulting 500 mA among the whole board. Interestingly enough, TI's ganged-port sample schematic shows the devices all connected together, even when using their power management IC:
The incoming 5V power supply line (highlighted in blue, as it's one of two nets that we're interested in on this complicated schematic) is connected to a TPS2041 power management IC (a generous description, it's really just a FET that shuts down when it detects 500mA of current being passed). However, each of the inputs are shorted together, and each of the outputs are shorted together as well, and then distributed to each of the downstream ports (the net shown in red).
Basically, they're doing overcurrent protection for all of the downstream sections in a single IC. They have no way of detecting whether they have three low-power (100mA) units, a single high-power unit, or two low-power units and one 300 mA unit. All these options are acceptable based on this reference design. You wrote:
According to the USB specification, a bus-powered hub can provide only one unit per downstream port while drawing max 5 units...
but, to directly answer your question, this design from Texas Instruments (a USB group member and major implementor) shows that you only have to guarantee that the total current is less than 5 units.
To solve your problem, the rules state (taken from the excellent USB in a nutshell document):
High power bus powered functions will draw all its power from the bus and cannot draw more than one unit load until it has been configured, after which it can then drain 5 unit loads (500 mA Max) provided it asked for this in its descriptor.
If you can guarantee that your driver stage will not begin drawing current until the device has been configured (which might be as simple as a timed delay in the host controller), you can simply wire everything together. Because your entire circuit is on a single PCB and has no user-accessible downstream ports, you can probably also leave out the TPS2041 and simply design the system to not require more than 500 mA of current in any state.
Another benefit of enumerating as a high-power device is improved input voltage specifications. When you have enumerated as a low-power device, the host is only required to produce 4.40 V at the upstream port (which will be lower at your device due to the resistance of the cable). When you have enumerated as a high-power device, the specification guarantees that you'll get 4.75 V, which is more likely to be within the operating range of any 5V components you may be using.
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Best Answer
No, USB SS enumeration does not require D+/D- wires, technically.
The priority of connect process in USB 3.0/3.1 framework is as follows:
USB plug is connected; SS Tx and Rx pairs are connected to HOST, D+ D- are connected as well, but initially do nothing.
The SS host Tx (transmitter) periodically sends short common-mode pulses of positive polarity, and watches for line response. If the line is connected and therefore terminated with 2x45 Ohms, the RC of this is different from open line. The transmitter identifies this, and proceeds to Polling.LFPS signaling. See section 6.11 of USB 3.0/3.1 specs. The process is called "Rx Detect".
The attached device tries to do the same with its Tx, but only upon seeing VBUS. If termination is detected, it starts its own Polling.LFPS signaling. These two processes are independent and asynchronous, see section 6.9.2
Whoever side starts LFPS first, it waits for the link partner to start its own LFPS. When the first partner detects valid LFPS bursts, it ends LFPS and moves to link training sequencing. The partner follows.
If one partner does not see the polling from other side in 360 ms, it moves into "compliance pattern". (actually, only device side does this automatically, the host needs to be specially enabled for this).
If the LFPS handshake was successful, both partners proceed into link training, sending TSQ, then TS1 and then TS2 "ordered sets", and then the link moves into active "U0" state, exchanging "link management" packets and determining link capabilities.
Only then the protocol layer kicks in and SS enumeration starts.
Only if both link partners failed to detect Rx termination, the SS device proceeds with USB 2.0 connection pulling up D+ line with 1.5k resistor. Then the link proceeds with USB 2.0 protocol.
The entire process has quite a few quirks, and is complicated. Similar SS process occurs when the link exits from low-power modes U1, U2, and U3, with a bit different timing for the handshake.
Therefore, technically, the presence of D+ and D- is unnecessary for the USB to operate in SS mode.