Electronic – VGA Timing – Sync & Porch Positions – FPGA

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I've been programming a VGA Module in verilog, and have spent some time fighting with my monitor to display some test colours. When referencing VGA timing diagrams online, it seems many are similar but the front, back & sync pulse positions are switched around.

I've managed to get it working using either orders below (for both vertical and horizontal)

  • Sync, Back-Porch, Display, Front-Porch
  • Front-Porch, Display, Back-Porch, Sync

However I have tested these (and they didn't work):

  • Display, Front-porch, Sync, Back-Porch
  • Front-Porch, Sync, Back-Porch, Display

I have confirmed through simulations that all tests were behaving as expected, although the monitor did not accept the second set above.
(I do hope that I didn't somehow manage to stuff up the non-working set above)

This timing diagram worked:
Example1

This other diagram on google didn't work:
Example2

I do understand the purpose of the porches & sync pulse, but with non-CRT monitors, does the position of these have any importance? Or is my test monitor (an old Acer) somehow not handling it? I haven't yet had a chance to test it on another monitor.

Any Input, or links to material would be appreciated.

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