circuit analysiscircuit-designintegrated-circuitslew-rate
I am reading about slew rate of two-stage OpAmp from this page.
However, I don't understand why the node voltage at drain of M2 or M4 is assumed to be a virtual ground here.
Could anyone explain that?
PS: I have just seen a paper here saying that the output voltage is also the voltage across the capacitor.
Could you explain why the voltage across the current source M0 is almost zero?
First case: The Colpitts oscillator is sort of a reverse on the Hartley oscillator. Instead of a tapped coil, it uses two capacitors in series to provide the feedback point.
Because feedback is through the capacitive leg of the LC tank circuit, the total capacitance of this leg is the series combination of C1 and C2, so that C = (C1*C2)/(C1+C2). The operating frequency is controlled by the tank circuit: ω = 2πf = 1/√(LC)
Because the transistor cannot be biased through the capacitors, we need a separate DC biasing circuit for the transistor itself. That is the purpose of the source resistor in this circuit. Of course, parasitic capacitance in the resistor and the transistor will have a small effect on operating frequency. However, this can be balanced out by careful adjustment of C in the tank circuit.
Second case:(Source is here)
Clapp oscillator is just a modification of Colpitts oscillator. The only difference is that there is one additional capacitor connected in series to the inductor in the tank circuit. The main purpose of adding this additional capacitor C3 is to improve the frequency stability. The insertion of this additional capacitor C3 prevents the stray capacitances and other parameters of the transistor from affecting C1 and C2. In variable frequency applications using Clapp oscillator, the common practice is to make the C1, C2 fixed and C3 is made variable. While deriving the frequency equation the additional capacitor must be also taken into consideration and the equation is:
The value of C3 is usually selected much small and so the value of C1 and C2 has less effect on the net effective capacitance. As a result the equation for frequency can be simplified as
Does this effect depend on anything else than the JFET/BJT input stage?
Slewing can happen in any stage of an OpAmp, it can happen in the input stage, the output stage and any of the intermediary stages. It occurs whenever a capacitor is driven by a fixed current source. For a given configuration one stage sets the limit and determines the slew-rate often this is in fact the input stage.
A typical input stage consists of a differential pair with a tail current source. In equilibrium the current of the tail current source splits equally and when driven hard on transistor takes the whole current. The required voltage to turn one of the transistors (almost) off determines the onset of slewing. It's a fixed voltage for BJTs and a variable voltage for FETs.
If slewing happens in the output stage and the output stage is not symmetrical (e.g. class A) it is possible to have different slew-rates for falling and rising edges.
Are there input stages where an even lower differential input voltage leads to the maximum slew rate? Perhaps some sort of hybrid?
I don't know of any off-the-shelf devices that do this, but certainly there are adaptively biased OpAmps that increase the current through the input stage to improve the slewing behavior.
Even if there are only two types, do different op-amps of the same type (say, BJT) have different levels?
BJTs have a fixed level, unless emitter degeneration is used and FETs can have different levels.
Best Answer
For my opinion, the term "virtual ground" is somewhat misleading. I think the following interpretation can help:
For ac signals, any constant power supply VDD is considered to have zero ohms source resistance - hence, it is considered to be "at virtual ground" for any voltage changes. The same applies in the case under discussion: We are interested in the time behaviour of changing voltages and currents. For slew rate calculations, the transistor M4 works as a switch and, hence, its drain voltage can be considered as constant. Therefore, for calculation of all voltage and current changes (caused by large input signals driving M4 into saturation), this node can also be considered to be at "virtual ground".
In this context, it is important to realize that the given expressions "I/C" are time derivatives "dV/dt".
Note that any input step (larger than 100mV) will drive the first stage of an opamp into saturation (for a short time period) until the delayed feedback signal will bring the stage back to linear operation.