I solved the problem. Design the hysteresis network (assuming Vs+Hys>Vp).
I needed 0.5V Hysteresis. So, I designed the circuit for 0.5V drop across Rs. The catch in the design is I needed to design the Rf to sink enough current into the Sbar internal FET so the FET will operate in saturation always.
The best part of this circuit is the hysteresis circuit is selectively connected or disconnected by the Sbar FET.
What you have there is similar to an SCR but with the gate tied so as to turn it on.
The hysteresis comes from the fact that BJTs (in this operating realm) have a lower Vce(sat) than Vbe- more like 0.2V than 0.5V When the voltage across the two transistors rises to Vbe * 2, you start to get significant collector current in the transistors, which is amplified by the transistors, leading to lower Vce in each, so you approach Vce(sat) * 2.
The Vbe I mentioned of 0.5V is less than the typically quoted 0.6 or 0.7V because only a tiny bit of base current is enough to get the transistors going in the positive feedback loop.
Keep in mind that the 'constant Vbe above which current flows' is kind of a convenient falsehood- some current will flow with any voltage across the junctions. In fact there would be no hysteresis (the thing would switch on immediately with any positive voltage) if the transistors had a constant \$\beta\$ with collector current , but they don't- the gain drops as the collector current drops, and at some point the loop gain is less than 1 and the circuit cannot latch on. So as the voltage rises you will see the (small) collector currents rise as well, tickling the dragon, until at some point (perhaps with a touch of noise) the loop gain exceeds 1.0 and the pair switches on.
You might want to plot the base and collector currents in your simulation to see the relationships. You can also plot the betas and the product of the betas vs. voltage or current (or time) in PSPICE.
Best Answer
Let's say you detect a low-to-high transition at 2.5 V. A 100 mV hysteresis would mean that the low-to-high transition is detected at 2.55 V and the high-to-low transition is detected at 2.45 V, a 100 mV difference.
Hysteresis is used to prevent several quickly successive changes if the input signal would contain some noise, for example. The noise could mean you cross the threshold of 2.5 V more than just once, which you don't want.
A 100 mV hysteresis means that noise levels less than 100 mV won't influence the threshold passing. Which threshold applies depends on whether you go from low to high (then it's the higher threshold) or from high to low (then it's the lower one):
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Another way to illustrate hysteresis is through its transfer function, with the typical loop:
As long as the input voltage remains below \$V_{T+}\$ the output is low, but if it exceeds this value the output switches to high (the up-going arrow). Then the output remains high as long as the input voltage stays above \$V_{T-}\$. When the input voltage drops below this threshold the output switches to a low level (the down-going arrow).
Note: hysteresis can also be used for other purposes than increasing noise immunity. The inverter below has a hysteresis input (which makes it a Schmitt trigger, indicated by the symbol inside the inverter). This simple circuit is all you need to make an oscillator.
Here's how it works. When it's switched on the capacitor's voltage is zero, so the output is high (it's an inverter!). The high output voltage starts charging the capacitor through R. When the voltage over the capacitor reaches the higher threshold the inverter sees this as a high voltage, and the output will go low. The capacitor will now discharge to the low output via R until the lower threshold is reached. The inverter will then again see this as a low voltage, and make the output high, so the capacitor starts to charge again, and the whole thing repeats.
The frequency is determined by the capacitor's and resistor's value as given in the equations. The difference between the frequency for the normal HCMOS (
HC) and the TTL-compatible (HCT) is because the threshold levels are different for both parts.