Electronic – What supplies power to the error amplifier in the LDO voltage regulator

power electronicsvoltage-regulator

I'm trying to design my own low-dropout voltage regulator and am doing some preliminary research. Please forgive my novice question, but one thing that I'm having trouble finding answers for is, what supplies the VDD for the error amplifier in the LDO? Take a look at this simulation, for example: http://www.falstad.com/circuit/e-opamp-regulator.html.

It's not clear to me how the op-amp is being powered. Similarly, check out this schematic from "CMOS" by J. Baker:

enter image description here

It's unclear to me where VDD originates. I thought that VDD would come from the voltage source I'm trying to regulate and that V_ref would be a separate reference voltage to dimension the output, but I don't see this explicitly mentioned.

Best Answer

The supply for the op-amp must come from the input voltage. Note that the simulated circuit is not really an LDO regulator since the highest a perfect op-amp could possibly swing is the input supply voltage and the output will be at least one diode drop below that.

Of course simulated circuits don't even necessarily need supply voltages so the Falstad simulation may not represent reality. For example, if you open the base connection you can see where the output voltage of the op-amp goes- possibly to 1kV or something silly like that.

Similarly the reference will be derived from the input voltage, however usually there is some attempt to bootstrap the reference supply so as to improve line regulation (reduce changes in reference voltage with input voltage changes). Ideally you could run the reference directly from the output voltage (assuming it's high enough), but then you have a start-up problem, and there are various ways around that issue.

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