Electronic – What’s happening to the DAC signal here

dacembedded

I have an Atmel ATmega328P using a 14-Bit MAXIM MAX544 DAC.

I have the ADC configured and running at 38kHz in running mode while the SPI is clocked at 4 MHz. I feel this should be more than equate for a 4 kHz + signal.

  • Is my DAC bottle necking here?
  • Why is my signal looking at that as its under sampling? And:
  • why isn't the 4.3 kHz signal not looking like the 50Hz one?

enter image description here
Figure 1: Sin Wave: 50Hz
enter image description here
Figure 2: Sin Wave: 4.4kHz
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Figure 3: SinWave: 20kHz
EDIT: The positive cycle is only present due to no biasing being implemented. 

#include <SPI.h>;

unsigned short x;

void setup() {
  DDRD |= 0x08;
  DDRB |= 0x04;
  DDRC |= 0x00;
  PORTD |= 0x08;

  ADMUX = 0x00;
  ADCSRA = 0xAD;
  ADCSRB = 0x00;
  ADCSRA |= 0x40;

  SPI.begin();
  SPI.setBitOrder (MSBFIRST);
  PORTB = 0x04;
}

ISR(ADC_vect) {
   x = ADCL | (ADCH << 8);   
   PORTB = 0x00;
   SPI.transfer(x);
   PORTB = 0x04;
}

void loop() {}

Best Answer

Why is my signal looking at that as its under sampling?

It doesn't look undersampled, rather you have no reconstruction filter so you get a stair-step waveform. Add the filter and you'll get the expected reconstructed signal.

why isn't the 4.3 kHz signal not looking like the 50Hz one?

Because you changed the time base on your oscilloscope. A combination of filtering your scope at lower frequencies and/or undersampling gives you something that looks more like the output of a reconstruction filter. Zoom back in and you should see that it is still a stair-step.

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