I haven't worked on anything that needed a 30-year product life, but I have worked on products that went into semiconductor manufacturing equipment, and needed 10+ years of support.
At least in those cases our customer was sane enough to realize that sometimes a slight redesign is the most cost effective and reliable solution.
Not every semiconductor manufacturer does lifetime buy notifications by package
Every reputable semiconductor manufacturer will give notifications on a per-part-number basis. If there is a manufacturer out there who doesn't do this, I wouldn't purchase from them for any project, let alone one with your stringent support requirements.
Reputable manufacturers don't just notify if a part/package is going obsolete, they notify for any change in the product that might impact quality (in the ISO 9000 sense). For example, they notify if the lead finish is changing from tin-lead to matte tin. They notify if the device packaging process is being moved from one factory to another.
some manufacturers simply fold up and disappear
This, or course can't be helped. And there are other similar risks.
David mentioned a case where a factory fire resulted in product obsolesences without notice. In another recent case I know, a (large and extremely well-known) fabless semiconductor company was forced to obsolete several lines of products because their foundry vendor decided to close down an older (and no longer sufficiently profitable) manufacturing line. At least in this case they were able to give advanced notice and allow for lifetime buys...but their products were not $0.05 transistors, they were complex $20 - $200 ICs, so you can imagine the investment required for some lifetime buys.
Other risks -- regulation
One more thing to watch out for is the march of environmental regulation. The European RoHS directive and similar laws may not apply to your products, but they affect your supply chain. RoHS, for example, forced a lot of mature products to be redesigned, reducing sales volume for a lot of mature components, which probably resulted in some obsolesences as specific parts became unprofitable.
New versions of RoHS are expected within a few years. So you can expect a new wave of obsolesences as the market settles out in relation to the new rules.
Other risks -- changed market landscape
If you designed a product 30 years ago and you designed it entirely with multi-sourced components like 2N2904's and 74LS04's, you would very likely still be able to get all those parts today.
But the trend in the last many years is away from multi-sourced components. Very few new products are being replicated across manufacturers. And the parts that are are at similar complexity levels to what was available 30 years ago --- hex logic gates, individual transistors, etc. Even "simple" devices like linear power regulators are now complex enough that nobody tries to duplicate another company's design exactly.
If you want to design in a microprocessor or a programmable logic device, you are simply stuck with a single-source component, and all the risk for long term support that entails.
Also, as my anecdote above pointed out, the rise of the fabless semiconductor company also adds risk because it means your chip vendors may not actually control their own manufacturing resources.
Strategy
To me, it sounds as if your sales team needs to get tougher with this customer (of course, engineers always say this).
One option is tell them you can fix the problem their way, but to maintain this level of support, the product price will be increasing XX% each year for the remainder of the product lifetime. You can make a lifetime buy for these obsolete products, but you'll need to pay for engineering evaluation of the requirements, technicians to manage the inventoried parts, etc., and you need revenue from these products to support that.
Another is to call their bluff on the re-tender process --- there can't be that many competitors out there who could realistically support these lifetime requirements, and those that can will price accordingly. On top of that, your team has experience with this particular application and the customer's detailed requirements, giving you an advantage when it comes to bidding the project. Who knows, you could come out of a re-tender with a contract at a substantially higher sales price.
Best Answer
EDIT -
First, notice that the two packages are very different in layout. One is called a DIP (Dual Inline Package - and yes, DIP package is redundant. Live with it.) package, and the pins (not the plastic body) are spaced on 0.1 inch spacings with a row spacing of 0.6. The other is a surface-mount package which does not use rows of pins. The difference is important.
END EDIT
First, you have to keep in mind that for the early logic chips, a 0.3 spacing became the de facto standard. It's important to realize that early (1960's) printed circuit fab techniques made the sort of narrow traces which we take for granted today very expensive, so running connections around a bunch of ICs was a problem for crowded footprints. Traces made on 0.1 inch center-to-center was the norm, with some daring designs using 0.050 pitch. To make matters worse, multilayer boards were almost unheard-of.
Even at the low gate densities of the time, there were some chips (like the 74150 and 74181) which required more than the common 16-pin DIP. At the time there was a reluctance to get the extra pins by making a longer, narrow package, and this had two issues. The first was PCB trace issues, and the other was mechanical. DIPs were made using a ceramic substrate, and a long, narrow platform would have been prone to mechanical failure when applying extraction force to one end of a socketed part.
So, since engineers and computer geeks tend to think in powers of 2 and 10, the larger pin counts were accomodated by doubling the row spacing to 0.6 and the standard length increased to 24 pins.
It's not certain if this was a dominant issue, but much logic design at the prototype stage was done using wire-wrap boards, and going from 0.3 to 0.6 allowed the production of "universal" WW boards with rows of pins at 0.3 spacing, allowing easy mixing of the two sizes. It would be nice to think that the IC companies recognized that engineers will tend to choose parts which are easier to work with in development and then use them in production.
It's worth pointing out that the choice was not universal. Some early RAMs with 22 pins were produced in 0.4 spacing, as well as the entire 100K ECL logic line, and occasional other chips as well, but the wild success of the TTL family made 0.3 and 0.6 the de facto standard.
With the explosion of chip capacity due to uCs and memory, pinouts began to grow, although chip sizes stayed within the bounds of 0.6 row spacing. Early (E)PROMs, for instance went from 24 pins to 28 quite rapidly, and thence to 32.
With the high pinouts needed for data busses, microprocessors jumped quickly to 40-pins, but once again mechanical constraints started to rear their ugly head. I believe there were a few 42-pin weirdos, but it was clear that going to longer chips would have bad reliability consequences due (again) to the fragility of ceramic substrates.
As a result, bigger chips, such as the Motorola MC68000 processors and various specialized DSP products such as multipliers and multiplier/accumulators, jumped to 0.9 inch row spacing, with 68 pins as the norm. About this time, though, it became apparent that there were shortcomings. With the big packages the lead lengths from the chip to the pins started getting onerous, especially as speed increased. Signal integrity/termination issues get much harder when there exists a long stub within the package. The answer was to go to packages which were not enormously larger than the chip, using SMD packages with much finer connection pitches than the old 0.1. This was aided by the fact that PCB production techniques had gotten good enough to accomodate the tight clearances required, and to do so at reasonable cost.
Just how bad the increased speed issues had become is shown by the introduction of some logic chips at the 20-pin DIP scale which had multiple ground pins instead of one, with the ground pins shifted from the convenient corner to the middle of one side, allowing very short ground connections from the chip to the pcb ground plane, with the specific aim of preventing ground bounce due to total lead inductance.
During this period, of course, it also became common to accept long skinny parts in smaller packages, particularly 20 and 24 pin parts in 0.3 spacing. As experience was gained with these skinny packages folks became more comfortable with them,and some specialty chips, such as FIFOs, were produced with 28 pins on .3 inch center, but these were special cases (FIFOs, for instance, tend to have very simple signal connections).