Electronic – Why does I2S have extra clock cycle in SCLK that is wasted i.e no data transferred

The AC-link part of the AC97 specification defines the five-wire interface between the codec and a controller. This is not just a data interface, but also a timing interface. This distinction may not seem important in a small embedded system with just one codec, but it becomes crucial in a larger system, such as a 96-channel digital mixing console. In this type of system, all of the audio interfaces need to be running at precisely the same sample rate and phase alignment, and the AC-link standard is designed to support that.

As the other answers have hinted, it is the responsibility of the device at the other end of the link — the "controller", which could be a dedicated ASIC, part of an FPGA, or a microcontroller — to manage both the timing of the codecs in the system as needed, as well as the movement of data from one timing domain to another with the use of suitable FIFOs or buffers.

I suspect it's an issue with your measurement technique. The specifications from the product link provided list the resistance, and there are only two values, one for the shield, and one for the conductors. That each conductor isn't listed separately implies they are all the same.

Further, that this is sold as a microphone further implies that the resistance is the same for each conductor. Were it not, it would not work as a balanced cable.

Measuring small resistances (certainly <1Ω) is difficult with an ordinary ohmmeter. In this range, the resistance of the test leads and the contact resistance can be significant. The precision of some meters may not be sufficient in this range. It can take some care to get an accurate measurement.