While testing a MCP6H01 I came across some weird behavior when the CM voltage exceeds the operating range specified in the datasheet (VDD-2.3V Max).
This is with the op-amp configured as a unity gain follower and rails of ±3V, Both channels are 1V/div. Channel 1 (orange) is the output, and Channel 2 (purple) is the input, as you can see when the input (and common mode signal) exceeds the specified maximum, it "latches" to VDD until the CM signal drops below the spec.
What causes this to happen? Why does it show this peculiar behavior? Looking at analogous CMOS op-amps like the ADA4665-2, they have CM ranges that go to or slightly exceed the rails as you would expect.
Best Answer
When you go outside the common mode range, beyond a bit of margin that is designed in for unit-to-unit and temperature variations, it's bound to do something undesirable. The op-amp you compared it to is a rail-to-rail input type, which has its own weirdness, though perhaps slightly more subtle.
Unless the op-amp creates internal supply rails that are higher than the external, it's not practical to make a rail-to-rail front end that works with a single differential pair, so they end up doing something like making two front ends, one for high and one for low input common mode range.
As you can see the yellow sample had an offset voltage that changed from almost +3mV to about 0 over about 500mV of common mode range. Think about what that means to CMRR. 55dB is guaranteed but that's the average over the entire 0-5V range. That compares to 82dB guaranteed for the Microchip part. If your CM noise happens to be in the 3.5-4V range you might get 20dB worse again than the average, more like 45 or even 35dB.
As you can see, the MCP6H01 offset voltage is very well behaved if you stay within the proper CM range, typically not changing more than tens of microvolts:
So, use a rail-to-rail input op-amp if you must, but there are real disadvantages and it's often not necessary.