In various places, e.g. this tutorial video by ti, a circuit like the following is being recommended to drive the analog input of a SAR A/D converter:
simulate this circuit – Schematic created using CircuitLab
The general intention is to ensure that the sampling capacitor of the ADC will be charged with sufficient accuracy by the end of the sampling period. If the source has a sufficiently low impedance, it can be connected directly to the analog input, but otherwise this circuit should be used.
I understand the use of the buffer amplifier, and that it has to be fast enough to settle to the required accuracy within the sampling period. I also understand how to choose the values for the extra RC filter, but I'm not entirely sure about its purpose. So why is it there? And as part of that, why is the recommended value for C1 10x to 20x the value of the sampling capacitor?
Best Answer
Someone else will most likely pop in with a better answer but as far as I know, the RC circuit has two components.
1) the SAR needs to see a stiff input when it samples the input. That could be either a capacitor or an op-amp that is stable with a heavy capacitive load.
2) most o-amps are NOT stable with heavy capacitive loads. Especially fast op-amps.
So the R isolates the op-amp from the heavy capacitive load presented by the SAR. But now the input to the SAR will sag because of the resistance.
The capacitor is added so that the input signal seen by the SAR doesn't sag very much when the signal is sampled.
In other words, even though it looks like a RC low-pass filter, that is not the intended result. Just consider it to be a freebie bonus!