Electronic – Why the common-mode gain of the differential pair is almost zero

You've asked quite a few questions. Let me try to answer them in the order you asked them.

1) "What I read about common mode noise is that it is a noise generated on all signal lines and is common to all lines. How can that be?" You should re-read that again as your first link specifically states that it is in a common direction on all the "signal lines." Basically what that means is that the lines where you care about noise have the same noise present on them, and the noise is in the same phase with the noise on the other lines.

2)"Now, my doubt being, how is the common mode noise generated ? What components generate common mode noise ?" CM noise is generated by anything with a varying signal, which includes noise, that is close enough to couple that signal into the line in phase with each other. That sounds complicated but lets break it down a bit more so that it's simpler to understand. Everything has some variation to it, be it noise or signal or anything else. These variations are called AC waves. These can couple to other lines either through capacitive coupling or through inductive coupling. You have two line that you care about. If the AC on the line near by the two you care about couples in it's outside AC onto your signal in phase (going the same direction) on both lines then that is a source of common mode noise.

3)"Now, in the link1 document it says power sources generate common mode noise. Is this applicable to both ac and dc power ?" Yes. Even DC power has some AC components to it, and all AC can be considered a noise source. Any noise source can be coupled commonly into any other signal.

4)"This means We connect one end to Vcc and gnd and then the other side to a dc rail and GND ? Is that it ? So that choke will have a current rating sufficing enough for the load ?" This is where you start getting a little fuzzy. The picture you included has a great example of how to hook up a common mode choke. The Vcc should pass through one inductor of the choke, and the GND should pass through the other inductor of the choke (Don't short them together). This also means that YES, the choke must have a current rating high enough for the power source's supplied current. Your understanding is correct.

I can't pretend I understand the scenario you are painting in your question but here's a brief explanation of how common mode rejection works. Look at the picture below - it shows both inputs connected to an AC signal that represents the common mode voltage: -

There is no real wanted signal just the unwanted common mode voltage. OK so far?

Think about Q1 first. If its base voltage rises a little bit then so does its emitter - this is natural transistor action and applies to MOSFETs or JFETs too. The effect of the emitter rising (common to both transistors) is that Q2's emitter rises and, because its base has also risen, there is very little net increase in base current into Q2 (or Q1).

The lack of change in base current for a significant change in the common-mode base voltage means very little change in either transistor's collector current. Very little change in collector current means very little change in collector voltage.

Hence, an identical significant change in base voltage on BOTH transistors results in very little change in collector voltage. This is the beginnings of largely rejecting a common mode (interfering) signal.

Simple statement: The gain of a differential pair amplifier to a common mode signal is significantly smaller than its gain when presented with a differential signal.

However, given that there is actually a small change in collector voltage for a significant change in common-mode base voltage, it is useful to note that both collectors will rise and fall together due to this significant common mode input voltage. This is very important because if a differential signal is applied the collectors go in opposite directions.

So, if the collectors were then fed as "a pair" to another set of differential inputs, common-mode signal rejection (in this 2nd pair) would be increased as a square term. In other words, if the first stage reduced common mode voltages by 10, the 2nd stage would reduce the common mode voltage by 100.

EDIT to cover the question about common-mode range exceeding power supply: -

Here is the equivalent circuit of the A and B inputs to a RS485 transceiver (SN65HVD485E): -

Note the external input is attenuated because of the 180 kohm and the two 36 kohm resistors and, although the device runs from 5V, it can handle input common mode voltages (absolute maximum ratings) of -9V to +14V.