My excercise is the following:
Make a circuit which outputs X^3 of two bit input of X.
Use the lowest number of HALF ADDERS as you can.
I don't really understand how to compute x cubed with half adders.
Any hints or help is appriciated.
Find x cubed with half adder
adder
Related Solutions
It can help to add intermediate states to the truth table; there are a lot of letters from the alphabet you haven't used :-). Name the output of the first XOR gate D and add a D column to the truth table. You may want to have clearly separated "inputs", "intermediate" and "outputs". I separate them with a vertical line, and fill out the combinations for the inputs. You have three of those, that's eight combinations.
Then fill out column D, which takes A and B as inputs. Even if there were 15 more inputs, ignore them; only A and B are relevant. Work gate per gate, divide and conquer. When you've finished column D you can fill out column S in the "outputs" section, because that only depends on D and Cin, and you have those.
Repeat for the outputs of the AND gates: add E and F to the "intermediates" section, and fill them out only looking at the columns which are input for each gate.
If you combine two half adders you get the carry-in functionality. Here's a half adder: -
And here's a full adder: -
Can you see what has happened i.e. two half adders are combined to make a full adder: -
- Two EXOR gates provide A+B then (A+B)+Cin
- One AND gates provide the intermediary Cout from the direct inputs of A & B
- Another AND provides the intermediary Cout from (A+B)+ Cin
- An OR gate produces the final Cout from the intermediary results.
So, in effect you have made an 8 bit adder using both "building blocks".
Best Answer
The input of the circuit is a 2 bit number (max value = 3) and the hence the maximum value at output will be 27 (a 5 bit number). The truth table of the circuit is:
$$\begin{array}{cccccccl}&\mathbf{x} & &\mathbf{b} &\mathbf{a} & &\mathbf{Y_4} &\mathbf{Y_3} &\mathbf{Y_2} &\mathbf{Y_1} &\mathbf{Y_0} & &x^3\\ \hline &\style{color:red}{0} &\rightarrow &0 &0 & &0 &0 &0 &0 &0 &\rightarrow &\style{color:red}{0}\\ &\style{color:red}{1} &\rightarrow &0 &1 & &0 &0 &0 &0 &1 &\rightarrow &\style{color:red}{1}\\ &\style{color:red}{2} &\rightarrow &1 &0 & &0 &1 &0 &0 &0 &\rightarrow &\style{color:red}{8}\\ &\style{color:red}{3} &\rightarrow &1 &1 & &1 &1 &0 &1 &1 &\rightarrow &\style{color:red}{27}\\ \hline & & & & & &ab &b &0 &ab &a\\ \hline \end{array}$$
The 'carry out' of an half adder, with inputs a and b, will be \$ab\$. So circuit can be implemented as given below.
\$\mathtt{ba}\$ is the input and \$\mathtt{Y_4Y_3Y_2Y_1Y_0}\$ is the output (\$\mathtt{Y_0}\$ is the LSB).