Offset Correction – How It Works in This Circuit

amplifiercmosdc-offsetdifferential-amplifierfeedback

I'm reading a paper about a received signal strength indicator (RSSI) amplifier. The amplifier was to estimate the relative power of the input signal, and was designed by cascading 6 limiting amplifiers and summing the outputs of each stage as a result. For reasons of size, the resistors were all implemented by switched-capacitor. The part that confused me was the DC offset correction design, as shown in the figure below.

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The paper said the RC low-pass filter was in a negative feedback loop but I cannot understand how it works. Because the common-mode voltage of the output seems not to be properly defined. Suppose vi+ = vi- = 0V (Vcm = 0V as a result), and the output > 0 because of mismatch (the current through MR1 is larger). If VFB would be larger, then the current through MR2 would be smaller and the offset would be suppressed. However, as the VFB is the negative output of the final stage, would it be larger? I'm a bit confused.

Best Answer

but I cannot understand how it works. Because the common-mode voltage of the output seems not to be properly defined.

The common-mode voltage of the output is defined by VCM on the left hand side of your diagram. The output from stage 6 is meant to have the same VCM as that present on stage 1.

Hence the "variable resistor" formed by the switched capacitor circuit and the actual capacitor that is connected to ground immediately to the left of the switched capacitor, form a low pass filter and pass DC to MR2. This is negative feedback.

MR2 can bypass MR1 and hence alter the voltage offset at the input and thus keeps VCM on the output as per VCM (the demand value) at the input.