Comparator – How Does the Resistor on the LM311 Comparator Output Work?

As shown the circuit does not work [tm].

Overall, without intending to be rude, I'd say the circuit was "designed" by someone with a poor understanding of the task and also drawn incorrectly.

• BA10358 datasheet here - immensely detailed information but seems normal enough. 0.2 V/uS slew rate and 0.5 MHz "bandwidth".

As shown, U1A inverting input is at 11 to 14V and the non inverting input is at 5V plus whatever effect the hysteresis / +ve feedback via R2 - probably about +/1 1 Volt - see below. Consequently, U4A can never switch.

The most likely explanation is that the variable resistor is not connected as shown but has one end of the resistive track connected to input (as shown), the wiper connected to U4A inverting input (as shown) BUT the other end of the resistor track grounded. This is "quite a leap" but nothing else makes sense. With the change the input to the opamp can be varied from Vtest down to ground.

If opamp supply and max Vout was say +10V then the Schmitt trigger formed by U4A would switch at about 6V when the input was rising and about 4V when the inout was falling.

As I think you know - IF the circuit was arranged as above, U4A is a comparator configured as a Schmitt trigger due to positive feedback via R12. As R12 is 100k would have 10 times less effect in the trigger level than R1 does as R1/R12 = 19k/100k BUT opamp Vout max+ is say 10V so has 10V/5V = twice as much effect - so 1/10 x 2/1 = 1/5 as much effect overall. So as Vref = 5V the feedback moved the switching point by ABOUT 1V to 6V and 4V on rising and falling inputs respectively.

The circuitry around U4B (also) appears to have been designed by somebody who did not understand what they were doing. Apart from the effect if input leakage currents of U4b, the resistors R3 and R4 have no effect. U4 pins 3 & 5 are effecively at the same potential. U4 pins 1 & 6 are effectively at the same potential.

U4B seems to serve little function except to invert the polarity of U4A and PERHAPS speed up overall switching speed at the output.
When input is low U4B "sees" Vrfe +1V on +in and - Vmax_-ve_swing on -in. U4B output is low with Vin low.
When the Schmitt starts to switch with rising Vin both inputs of U4B fall but the -in from u4A falls further and toggles U4B. If anything this MAY slow down the switching action as both inputs track in the same direction, but one swings further, so there is negative reinforcement around the switching point.
Strange.

This opamp is cheap. Under $US0.20 in manufacturinmg volumes. BUT here it is being used as a comparator and it is not well suited to that task. Slew rate is a miserable 0.2 V/uS and maximum frequency (whatever that spec means here) is 0.5 MHz.

For making a logic analyzer, the main speed bottleneck is going to be your voltage comparator. Even the super fast ones are typicaly not as fast as a normal digital logic buffer. A comparator with a propagation delay of 4 ns is considered to be super fast for analog but not very fast for digital logic. 4ns would work for an analyzer that runs somewhere in the 50-100 MHz range, which is just barely suitable for a lot of the things I do.

If I were doing a logic analyzer I would just use the normal FPGA inputs along with some protection features to prevent damage from 5v inputs and ESD-- mostly a current limiting resistor and some ESD protection diodes.

But let's move on to the voltage comparator threshold. I would create a DAC. The easiest way is to output a PWM signal from the FPGA and run that through an RC filter. The RC filter output should be an analog voltage whos voltage is related to the duty cycle of the PWM signal. Start with 3.3K ohms and 1 uF, and go larger if there is too much noise on that signal. Then buffer the RC output using a simple Opamp. The output of the opamp goes to the voltage comparators. You might need several buffers, or a cascade/tree of buffers if you have a lot of comparators.

Another thing to consider is that many opamps/comparators do not handle rail-to-rail inputs. This is more important when your inputs are low voltage signals, like 1.5 and 1.2v. But could be an issue even with 3.3v logic inputs if you do not carefully select the comparator. One way around this is to power your comparator off of something other than GND and +3.3v (or whatever). Maybe -1.0 and +5v is more appropriate. Beware, however, that you give the FPGA valid input voltages otherwise you risk blowing that up.

Good luck!