When you match to complex valued loads the matching for zero power reflection states that the impedance seen from your complex-valued load (\$100+50j\$) has to be its complex conjugate (\$100-50j\$).
This is because that way we would be satisfying the max. power theorem, and, at the same time, getting rid of the imaginary part of your load.
A confusing article. If you don't already know what you're looking for, then it doesn't really help. What you're missing is that the IC pin is more or less insignificant compared to the PCB trace, for most systems.
If you follow the strategy in figure 7, then you will get good results, as long as your receiver can cope with half the swing that the transmitter puts out.
Figure 7 shows source and sink termination, the 100\$\Omega\$ resistors matching the line, and assuming no contribution or degradation from the IC pins at all. This is pretty much valid for most rise times and most 'low speed' systems, say below 500MHz, even for a few pF of silicon and pin capacitance, as long as the PCB transmission line is taken care of.
The alternative matching scheme for a) where you want more receiver swing and b) you have point to point connection is to use series source-only line termination. This means that you leave out the shunt R at the receiver. The transmitter launches a half-height signal into the line, it is reflected to full height at the receiver (a process it sounds like you know about), and then the reflection is absorbed in the source resistor. This half to full height reflection is why it can only be used point to point, not with multi-drop connections.
Obviously, for matching 50\$\Omega\$ lines, you'd use 50\$\Omega\$ resistors, though you may want to reduce the value of the source resistor to take account of the output resistance of the driver. Some drivers might have such a high source resistance that no additional source resistor needs to be used.
Make sure than your drivers have the capacity to drive 50\$\Omega\$ lines, that is a 100\$\Omega\$ load. TI used 100\$\Omega\$ lines as an example as that's kinder to drivers, and they take less width on a PCB.
Where TI's calculation of pin inductance and capacitance does become useful is when the chip has an internal termination, or frequencies have gone so high that it does become significant. I figure that if you're designing GHz serial links, you will not be scratching around on stack exchange looking for help, or you will be following the reference design board faithfully.
Best Answer
If I understand your screenshot, you're simulating a cable using discrete 10cm segments. For that model to be accurate, your rise time must be much longer (order of magnitude) than the time for your signal to propagate 10 cm, which is about 0.5 ns. How fast do your transistors switch?
My guess is a few nanoseconds at most, since for a real piece of RG-58 if you put a 50 ohm terminating resistor and measure the output of a square wave generator you'll get a relatively clean edge with minimal reflection.