Implementing a function with 4 inputs with 2×4 decoders

decoderdigital-logic

I'm a bit confused on how it is done. In the pdf we were given it only showed the solution, no explanation whatsoever.

My guess is in order to implement 4 inputs with 2 input decoders, the decoder with AB was distributed to the other gates as positive-enable input but Im a tad bit stuck there. How do you implement this step-by-step?

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Best Answer

The five 2:4 decoders are simply being used to construct a 4:16 decoder. Each output from this decoder represents one of the 16 possible combinations of input values. This part is going to be the same for any 4-input function.

The only part you need to "design" is which of these 16 outputs you connect to the big NOR gate, and this is simply all of the outputs that correspond to zeros in the K-map for the function. Is this enough of a hint?

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